TMS320DM641_05 Datasheet, PDF (128/179 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Multichannel Audio Serial Port (McASP0) Peripheral
MULTICHANNEL AUDIO SERIAL PORT (McASP) TIMING (CONTINUED)
9
AHCLKR/X (Falling Edge Polarity)
10
10
AHCLKR/X (Rising Edge Polarity)
11
ACLKR/X (CLKRP = CLKXP = 1)^†
12
12
ACLKR/X (CLKRP = CLKXP = 0)^‡
13
13
AFSR/X (Bit Width, 0 Bit Delay)
13
13
AFSR/X (Bit Width, 1 Bit Delay)
AFSR/X (Bit Width, 2 Bit Delay)
13
AFSR/X (Slot Width, 0 Bit Delay)
13
13
AFSR/X (Slot Width, 1 Bit Delay)
AFSR/X (Slot Width, 2 Bit Delay)
14
15
AXR[n] (Data Out/Transmit)
A0 A1
A30 A31 B0 B1
B30 B31 C0 C1 C2 C3
C31
† _{For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP receiver is configured for rising}
edge (to shift data in).
‡ _{For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP receiver is configured for falling}
edge (to shift data in).
Figure 4−36. McASP Output Timings
128 SPRS222E
June 2003 − Revised October 2005