DRV3202-Q1_15 Datasheet, PDF (7/39 Pages) Texas Instruments – 3-Phase Brushless Motor Driver

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VB
DRV3202-Q1
SLVSBJ4A – OCTOBER 2012 – REVISED DECEMBER 2012
Do not switch to RES LOW
when the VCC LOW time
is less than tRES.
VNMI+VHS
VCC
VSTN
tRES
Ignore transient voltage falling
NMI
(Internal signal)
RES is HIGH after tON from NMI-HIGH
if internal clock is not generated
(In case of malfunction).
Switch to NMI-LOW after tRES delay
when VCC is lower than VNMIL
RES signal should remain in low voltage
(< -0.4 V) and in this case, controlled CPU
should be in
tRH
tRES
RES is HIGH after tON from of NMI-HIGH.
RES
PRN
tON
tRL
RES is LOW at NMI-LOW. tON
Pwth
tOFF
Detecting only rising edge of PRN signal Switch to RES LOW if PRN stays at a High or LOW
level.
VNMI
tRES
RES is LOW at NMI-LOW.
If WDEN is LOW (or OPEN),
and there is abnormal PRN:
RES is active.
If WDEN is HIGH,
and there is abnormal PRN:
no operation.
WDEN
NOTE: WDEN = High, V_CC undervoltage condition sets RES = Low
Figure 3. Watchdog Timing Chart
WATCHDOG ELECTRICAL CHARACTERISTICS⁽¹⁾
VB = 12 V,T_A = –40°C to 125°C (unless otherwise specified)
PARAMETER ⁽²⁾
CONDITIONS
WATCHDOG
VSTN
t_ON
t_OFF
t_RL
t_RH
t_RES
P_wth
Function start V_CC voltage RES
Power-on time RES
Clock off reset time RES
Reset pulse low time RES
Reset pulse high time RES
Reset delay time RES
Pulse width PRN
Refer to Figure 3
MIN TYP
–
0.8
32
40
64
80
16
20
64
80
30 71.5
200
–
(1) The watchdog function is disabled and the timing parameters are invalid when the WDEN is at a high level.
(2) Specified by design
MAX UNITS
1.3 V
48 ms
96 ms
24 ms
96 ms
90 µs
– ns
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: DRV3202-Q1
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