DRV3202-Q1_15 Datasheet, PDF (11/39 Pages) Texas Instruments – 3-Phase Brushless Motor Driver

DRV3202-Q1
www.ti.com
SLVSBJ4A – OCTOBER 2012 – REVISED DECEMBER 2012
7. B15-B10 = Other command
This command sets the SPI-NG (DOUT, B7) bit.
Table 2. SPI Bit Map (DOUT)
ITEM
ON/OFF COMMAND
ECHO BACK
DIAG_READ1
DIAG_READ2
DIAG_READ3
B15
B14
B13
B12
B11
B10
B9
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
1. B14-B9 = 0 0 1 0 0 0
This flag is cleared after the register is read by the CPU.
1) V_CC Current Detection (B7)
MM0: NORMAL
MM1: Fail (Short to GND or open)
2) Overcurrent Detection (B6)
MM0: NORMAL
MM1: Fail (Overcurrent)
3) CAN Current Detection (B5)
MM0: NORMAL
MM1: Fail (Overcurrent)
4) V_CC Overvoltage Detection (B4)
MM0: NORMAL
MM1: Fail (V_CC overvoltage)
5) V_DD Overvoltage Detection (B3)
MM0: NORMAL
MM1: Fail (V_DD overvoltage)
6) CPV Low Voltage Detection (B2)
MM0: NORMAL
MM1: Fail (CPV low voltage)
7) Thermal Detection (B1)
MM0: NORMAL
MM1: Fail (Overtemperature)
8) EEPROM* Data Consistency Check (B0)
MM0: NORMAL
MM1: Fail (EEPROM DATA CRC error)
*ASIC calibration EEPROM
B8
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
0
0
0
0
0
0
–
–
–
–
–
–
–
–
0
–
–
–
–
–
–
–
–
0
VCC OCD CCD VCO VDO CPLV TD
EEP
0
SPI
–
–
–
–
–
–
–
0
–
–
–
–
–
–
–
–
NOTE
Just after power-on of the IC, some of the bits listed above may be set depending on the
apply sequence of VB. It is recommended to issue a DIAG_READ1 to clear these bits
prior to all S/W sequences.
2. B14-B9 = 0 1 0 0 0 0
This flag is cleared after the register is read by the CPU.
1) SPI-NG (B7)
MM0: NORMAL
MM1: Fail (SPI read and write command is wrong)
Copyright © 2012, Texas Instruments Incorporated
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