DRV3202-Q1_15 Datasheet, PDF (25/39 Pages) Texas Instruments – 3-Phase Brushless Motor Driver

DRV3202-Q1
www.ti.com
SLVSBJ4A – OCTOBER 2012 – REVISED DECEMBER 2012
PHASE AMPLIFIER (Sample and Hold Mode and Through Mode)
Description
The 3-channel amplifier module monitors the drain-source for high-side and low-side FETs. Two modes (selected
by the SPI) are provided: sample and hold mode, and through mode. Sample and hold is controlled by PSSx at
the external pins and PSCx connects the charging capacitor. Through mode is real-time detection and the
amplifier has x1–x4 gain control.
VB
CLAMP
7:1
PH1T
PH2T
PH3T
CAL_MODE
CLAMP
3:1
CAL_MODE
2.5 V
VCC
-
+
VCC
-
+
VCC
-
+
R2
R1
VCC
-
open
+
Sample
and
Hold
R1
R2
SH_MODE
High: Sample and Hold Mode
Low: Through Mode
VCC
-
+
PTV1
PTV2 PTVx = ¼ x (R2 / R1) x (PHxT-½ x VB) + 2.5 V
PTV3
PSC
PSC1
PSC2
PSC3
PSS1
PSS2
PSS3
Figure 20. Sample and Hold Mode Block Diagram
VB
7:1
CLAMP
PH1T
PH2T
PH3T
3:1
SHORT_MODE
CLAMP
SHORT_MODE
2.5 V
VCC
VCC
VCC
R2
R1
VCC
R1
R2
Short
Open
SHORT_MODE
High: Sample and Hold Mode
Low: Through Mode
VCC
PTV1
Disable ^PTV2
PTV3
PTVx = ¼*(R2 / R1)*(PHxT ± ½*VB) + 2.5 V
PSC1
PSC2
PSC3
PSS1
PSS2
PSS3
Figure 21. Through Mode Block Diagram
Copyright © 2012, Texas Instruments Incorporated
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