BQ24030_07 Datasheet, PDF (7/38 Pages) Texas Instruments – SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC (bqTINY)

bq24030, bq24031, bq24032A
bq24035, bq24038
www.ti.com
SLUS618F – AUGUST 2004 – REVISED NOVEMBER 2006
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C ≤ T_J ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STAT1, STAT2. ACPG AND USBPG, PG OPEN DRAIN (OD) OUTPUTS⁽¹⁴⁾
V_OL
Low-level output saturation
voltage
I_OL = 5 mA, An external pullup
resistor ≥ 1 K required.
0.25
V
I_LKG
Input leakage current
ISET2, CE, VBSEL INPUTS
1
5
µA
V_IL
V_IH
I_IL
I_IH
I_IL
I_IH
I_IL1
I_IH1
t_(CE-HLDOFF)
PSEL INPUT
Low-level input voltage
High-level input voltage
Low-level input current, CE
High-level input current, CE
Low-level input current, ISET2
High-level input current, ISET2
Low-level input current
High-level input current
Holdoff time, CE
V_ISET2 = 0 V
V_ISET2 = V_CC
VBSEL = Low
VBSEL = High
CE going low only
0
0.4
V
1.4
–1
1
–20
µA
40
6
1
15
4
6
ms
V_IL
Low-level input voltage
Falling Hi→Low; 280 K ± 10% applied
when low.
0.975
1
1.025
V
V_IH
I_IL
I_IH
TIMERS
High-level input voltage
Low-level input current, PSEL
High-level input current, PSEL
Input R_PSEL sets external hysteresis
V_IL + .01
–1
V_IL + .024
V
µA
µA
K_(TMR)
R_(TMR) ⁽¹⁵⁾
t_(PRECHG)
I_(FAULT)
Timer set factor
External resistor limits
Precharge timer
Timer fault recovery pullup from
OUT to BAT
t_(CHG) = K_(TMR) × R_(TMR)
0.313
0.360
0.414 s/Ω
30
100
kΩ
0.09 × t_(CHG) 0.10 × t_(CHG) 0.11 × t_(CHG)
s
1
kΩ
CHARGER SLEEP THRESHOLDS (ACPG , PG, and USBPG THRESHOLDS, LOW → POWER GOOD)
V_(SLPENT) ⁽¹⁶⁾
V_(SLPEXIT) ⁽¹⁶⁾
Sleep-mode entry threshold
Sleep-mode exit threshold
V_(UVLO)≤ V_I(BAT)≤ V_O(BAT-REG),
No t_(BOOT-UP) delay
V_(UVLO)≤ V_I(BAT)≤ V_O(BAT-REG),
No t_(BOOT-UP) delay
V_VCC ≥
V_I(BAT)
+190 mV
V_VCC ≤
V_I(BAT)
+125 mV
V
t_(DEGL)
Deglitch time for sleep mode⁽¹⁷⁾
R_(TMR) = 50 kΩ,
V_(AC) or V_(USB) or decreasing below
threshold, 100-ns fall time, 10-mv
overdrive
22.5
ms
START-UP CONTROL and USB BOOT-UP
t_(BOOT-UP)
Boot-up time
On the first application of USB input
power or AC input with PSEL Low
120
150
180 ms
(14) See Charger Sleep mode for ACPG (V_CC = V_AC) and USBPG (V_CC = V_USB) specifications.
(15) To disable the safety timer and charge termination, tie TMR to the LDO pin.
(16) The IC is considered in sleep mode when both AC and USB are absent (ACPG = USBPG = OPEN DRAIN).
(17) Does not declare sleep mode until after the deglitch time and implement the needed power transfer immediately according to the
switching specification.
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