TMS320DM642_08 Datasheet, PDF (64/176 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor

TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
SPRS200L – JULY 2002 – REVISED JANUARY 2007
www.ti.com
Table 3-8. DM642 Device Multiplexed Pin Configurations⁽¹⁾ (continued)
MULTIPLEXED PINS
NAME
NO.
VP1D[8]/CLKR1
AD8
VP1D[7]/FSR1
AC7
VP1D[6]/DR1
AD7
VP1D[5]/CLKS1
AE7
VP1D[4]/DX1
AC6
VP1D[3]/FSX1
AD6
VP1D[2]/CLKX1
AE6
VP0D[19]/AHCLKX0
AC12
VP0D[18]/AFSX0
AD12
VP0D[17]/ACLKX0
AB13
VP0D[16]/AMUTE0
AC13
VP0D[15]/AMUTEIN0
AD13
VP0D[14]/AHCLKR0
AB14
VP0D[13]/AFSR0
AC14
VP0D[12]/ACLKR0
AD14
VP0D[8]/CLKR0
AE15
VP0D[7]/FSR0
AB16
VP0D[6]/DR0
AC16
VP0D[5]/CLKS0
AD16
VP0D[4]/DX0
AE16
VP0D[3]/FSX0
AF16
VP0D[2]/CLKX0
AF17
XSP_CLK/MDCLK
R5
DEFAULT
FUNCTION
McBSP1
functions
None
McBSP0
functions
DEFAULT
SETTING
DESCRIPTION
VP1EN bit = 0 (disabled)
MCBSP1EN bit = 1
(enabled)
By default, the McBSP1 peripheral, function is enabled
upon reset (MCBSP1EN bit = 1).
To enable the Video Port 1 data pins, the VP1EN bit in the
PERCFG register must be set to a 1.
By default, no function is enabled upon reset.
VP0EN bit = 0 (disabled)
MCASP0EN bit = 0
(disabled)
To enable the Video Port 0 data pins, the VP0EN bit in the
PERCFG register must be set to a 1. (McASP0 control
pins are disabled).
To enable the McASP0 control pins, the MCASP0EN bit in
the PERCFG register must be set to a 1. (VP0 upper data
pins are disabled).
VP0EN bit = 0 (disabled)
MCBSP0EN bit = 1
(enabled)
By default, the McBSP0 peripheral function is enabled
upon reset (MCBSP0EN bit = 1).
To enable the Video Port 0 data pins, the VP0EN bit in the
PERCFG register must be set to a 1.
By default, no functions enabled upon reset (PCI is
disabled).
XSP_DO/MDIO
HAS/PPAR
HCNTL1/PDEVSEL
HCNTL0/PSTOP
HDS1/PSERR
HDS2/PCBE1
HR/W/PCBE2
HHWIL/PTRDY
HINT/PFRAME
HCS/PPERR
HRDY/PIRDY
None
P5
PCI_EN = 0 (disabled)⁽¹⁾
MAC_EN = 0
(disabled) ⁽¹⁾
To enable the PCI peripheral, an external pullup resistor
(1 kΩ) must be provided on the PCI_EN pin (setting
PCI_EN = 1 at reset)
To enable the MDIO peripheral (which also enables the
EMAC peripheral), an external pullup resistor (1 kΩ) must
be provided on the MAC_EN pin (setting MAC_EN = 1 at
reset)
P3 HAS
P1 HCNTL1
R3 HCNTL0
R2 HDS1
T2 HDS2
By default, HPI is enabled upon reset (PCI is disabled).
M1 HR/W
PCI_EN = 0 (disabled)^{(1) To enable the PCI peripheral, an external pullup resistor}
(1 kΩ) must be provided on the PCI_EN pin (setting
N3
HHWIL
(HPI16 only)
PCI_EN = 1 at reset).
N4 HINT
R1 HCS
N1 HRDY
64
Device Configurations
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