TMS320DM642_08 Datasheet, PDF (127/176 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor

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HAS
HCNTL[1:0]
HR/W
HSTROBE ^(A)
HCS
HD[31:0] (output)
1
2
1
2
7
TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
SPRS200L – JULY 2002 – REVISED JANUARY 2007
3
9
15
6
8
HRDY
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
Figure 5-42. HPI32 Read Timing (HAS Not Used, Tied High)
19
HAS ^(A)
HCNTL[1:0]
11
10
HR/W
HSTROBE ^(B)
11
10
18
3
HCS
7
HD[31:0] (output)
9
15
HRDY
6
8
A. For correct operation, strobe the HAS signal only once per HSTROBE active cycle.
B. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
Figure 5-43. HPI32 Read Timing (HAS Used)
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DM642 Peripheral Information and Electrical Specifications 127