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TMS320DM642_08 Datasheet, PDF (109/176 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processor
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5.8.3.5 BUSREQ Timing
TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
SPRS200L – JULY 2002 – REVISED JANUARY 2007
Table 5-30. Switching Characteristics Over Recommended Operating Conditions for the BUSREQ Cycles
for EMIFA Module (see Figure 5-31)
NO.
1
td(AEKO1H-ABUSRV)
PARAMETER
Delay time, AECLKOUTx high to ABUSREQ valid
–500, A-600
MIN MAX
0.6 7.1
–600
–720
MIN MAX
1 5.5
UNIT
ns
AECLKOUTx
ABUSREQ
1
1
Figure 5-31. BUSREQ Timing for EMIFA
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DM642 Peripheral Information and Electrical Specifications 109