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CD74HC299 Datasheet, PDF (6/10 Pages) Texas Instruments – High Speed CMOS Logic 8-Bit Universal Shift Register; Three-State
◁
CD74HC299, CD74HCT299
Switching Specifications CL = 50pF, Input tr, tf = 6ns
PARAMETER
TEST
SYMBOL CONDITIONS VCC (V) MIN
HC TYPES
Propagation Delay
Clock to I/O Output,
Clock to Q0 and Q7,
MR to Output
tPLH, tPHL CL = 50pF
2
-
4.5
-
CL = 15pF
5
-
CL = 50pF
6
-
Output Enable and Disable
tPZL
CL = 15pF
5
-
Times
tPZH, tPLZ
-
tPHZ
-
Output High-Z to High Level tPZH
CL = 50pF
2
-
4.5
-
25oC
TYP MAX
- 200
-
40
17
-
-
34
10
-
13
-
15
-
- 155
-
31
-40oC TO
85oC
MIN MAX
-
250
-
50
-
-
-
43
-
-
-
-
-
-
-
195
-
39
6
-
-
26
-
33
Output High Level to High-Z tPHZ
CL = 50pF
2
-
-
185
-
230
4.5
-
-
37
-
46
6
-
-
31
-
39
Output Low Level to High-Z
tPLZ
CL = 50pF
2
-
-
155
-
195
4.5
-
-
31
-
39
6
-
-
26
-
33
Output High-Z to Low Level
tPZL
CL = 50pF
2
-
-
130
-
165
4.5
-
-
26
-
33
6
-
-
22
-
28
Output Transition Time
Q0, Q7
tTHL, tTLH CL = 50pF
2
-
-
75
-
95
4.5
-
-
15
-
19
6
-
-
13
-
16
I/O0 to I/O7
tTHL, tTLH CL = 50pF
2
-
-
60
-
75
4.5
-
-
12
-
15
6
-
-
10
-
13
Input Capacitance
Three-State Output
Capacitance
CI
CL = 50pF
-
10
-
10
-
10
CO
-
-
20
-
20
-
20
Power Dissipation Capacitance CPD
CL = 15pF
5
- 150 -
-
-
(Notes 4, 5)
-55oC TO
125oC
MIN MAX UNITS
-
300 ns
-
60
ns
-
-
ns
-
51
ns
-
-
ns
-
-
ns
-
-
ns
-
235 ns
-
47
ns
-
40
ns
-
280 ns
-
56
ns
-
48
ns
-
235 ns
-
47
ns
-
40
ns
-
195 ns
-
39
ns
-
33
ns
-
110 ns
-
22
ns
-
19
ns
-
90
ns
-
18
ns
-
15
ns
-
10
pF
-
20
pF
-
-
pF
6
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