CD74HC299 Datasheet, PDF (2/10 Pages) Texas Instruments – High Speed CMOS Logic 8-Bit Universal Shift Register; Three-State

CD74HC299, CD74HCT299
Functional Diagram
CP OE1 OE2 MR
12
23
9
THREE-
STATE
CONTROL
20
V_CC
7
I/O ₀
6
BUS LINE
OUTPUTS
I/O ₂
5
I/O ₄
4
I/O ₆
STANDARD
OUTPUT
Q0
8
1
S0
I/O
THREE-STATE
OUTPUTS
SHIFT
REGISTER
I/O
THREE-STATE
OUTPUTS
MODE SELECTION
13
I/O ₁
14
I/O ₃
15
I/O ₅
BUS LINE
OUTPUTS
16
I/O₇
17
Q7
STANDARD
OUTPUT
19
S1
10
GND
11 18
DS0 DS7
FUNCTION
Read Register
Load Register
Disable I/O
MODE SELECT FUNCTION TABLE THREE-STATE I/O PORT OPERATING MODE
OE1
L
L
L
L
X
OE2
L
L
L
L
X
INPUTS
S0
S1
L
X
L
X
X
L
X
L
H
H
Qn (REGISTER)
L
H
L
H
Qn = I/On
H
X
X
X
X
X
H
X
X
X
INPUTS/OUTPUTS
I/O0 --- I/O7
L
H
L
H
I/On = Inputs
(Z)
(Z)
TRUTH TABLE
INPUTS
REGISTER OUTPUTS
FUNCTION
MR CP
S0
S1 DS0 DS7 I/On Q0
Q1
---
Q6 Q7
RESET (CLEAR)
L
X
X
X
X
X
X
L
L
---
L
L
Shift Right
Shift Left
Hold (Do Nothing)
Parallel Load
H
↑
h
l
l
X
X
L
q₀
---
q₅
q₆
H
↑
h
l
h
X
X
H
q₀
---
q₅
Q6
H
↑
l
h
X
l
X
q₁
q2
---
q₇
L
H
↑
l
h
X
h
X
q₁
q₂
---
q₇
H
H
↑
l
l
X
X
X
q₀
q₁
---
q₆
q₇
H
↑
h
h
X
X
l
L
L
---
L
L
H
↑
h
h
X
X
h
H
H
---
H
H
NOTE: H = Input Voltage High Level, h = Input voltage high one set-up timer prior clock transition; L = Input Voltage Low Level; l = Input
voltage low one set-up time prior clock transition; qn = Lower case letter indicates the state of the reference output one set-up time prior to
clock transition; X - Voltage level on logic status don’t care; Z = Output in high impedance state, ↑ = Low to High Clock Transition.
2