CD74HC299 Datasheet, PDF (4/10 Pages) Texas Instruments – High Speed CMOS Logic 8-Bit Universal Shift Register; Three-State

CD74HC299, CD74HCT299
DC Electrical Specifications (Continued)
PARAMETER
Quiescent Device
Current
SYMBOL
I_CC
TEST
CONDITIONS
V_I (V)
V_CC or
GND
I_O (mA)
0
V_CC
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
(V) MIN TYP MAX MIN MAX MIN MAX UNITS
6
-
-
8
-
80
-
160
µA
Three- State Leak- V_IL or V_IH V_O = V_CC
-
age Current
or GND
6
-
-
±0.5
-
±5
-
±10
µA
HCT TYPES
High Level Input
V_IH
-
Voltage
-
4.5 to 2
-
-
2
-
2
-
V
5.5
Low Level Input
V_IL
-
Voltage
-
4.5 to -
-
0.8
-
0.8
-
0.8
V
5.5
High Level Output V_OH V_IH or V_IL
-0.02
4.5 4.4
-
-
4.4
-
4.4
-
V
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
-4
4.5 3.98
-
-
3.84
-
3.7
-
V
Low Level Output
Voltage
CMOS Loads
V_OL V_IH or V_IL
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I_I
V_CC and
0
GND
5.5
-
±0.1
-
±1
-
±1
µA
Quiescent Device
I_CC
V_CC or
0
5.5
-
-
8
-
80
-
160
µA
Current
GND
Three- State Leak- V_IL or V_IH V_O = V_CC
-
age Current
or GND
6
-
-
±0.5
-
±5
-
±10
µA
Additional Quies-
cent Device Cur-
∆I_CC
V_CC
-2.1
rent Per
Input Pin: 1 Unit
Load
-
4.5 to -
100 360
-
450
-
490
µA
5.5
NOTE: For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
S1, MR
0.25
I/O₀ - I/O₇
0.25
DS0, DS7
0.25
S0, CP
0.6
OE1, OE2
0.3
NOTE: Unit
e.g., 360µA
load
max.
iast ∆_{2I5CoCCl.imit}
specific
in
Static
Specifications
Table,
4