BQ34Z653 Datasheet, PDF (6/25 Pages) Texas Instruments – SBS 1.1-Compliant Gas Gauge and Protection Enabled with Impedance Track with External Battery Heater Control and LCD Display

bq34z653
SLUSB53 – JULY 2012
PIN
NO.
NAME
13
TS1
14
TS2
15
PRES
16
PFIN
17
SAFE
18
SMBD
19
NC
20
SMBC
21
DISP
22
VSS
23 LED1/SEG1
24 LED2/SEG2
25 LED3/SEG3
26 LED4/SEG4
27 LED5/SEG5
28
GSRP
29
GSRN
30
MRST
31
VSS
32
REG25
33
RBI
34
VSS
35
RESET
36
ASRN
37
ASRP
38
VC5
39
VC4
40
VC3
41
VC2
42
VC1
43
BAT
44
CHG
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PIN FUNCTIONS (continued)
I/O ⁽¹⁾
DESCRIPTION
IA
IA
I
I
O
I/OD
—
I/OD
I/OD
P
I
I
I
I
I
IA
IA
I
P
P
P
P
O
IA
IA
IA, P
IA, P
IA, P
IA, P
IA, P
I, P
O
1^st thermistor voltage input connection to monitor temperature
2^nd thermistor voltage input connection to monitor temperature
Active low input to sense system insertion. Typically requires additional ESD protection.
Active low input to detect secondary protector status, and to allow the bq34z653 to report the status of
the 2^nd-level protection input
Active high output to enforce additional level of safety protection; e.g., fuse blow
SMBus data open-drain bidirectional pin used to transfer address and data to and from the bq34z653
Not used—leave floating.
SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq34z653
Display control for the LEDs. This pin is typically connected to VCC via a 100-kΩ resistor and a push
button switch connected to VSS.
Negative supply voltage input. Connect all VSS pins together for operation of device.
LED1/SEG1 display segment that drives an external LED or LCD depending on the firmware
configuration
LED2/SEG2 display segment that drives an external LED or LCD depending on the firmware
configuration
LED3/SEG3 display segment that drives an external LED or LCD depending on the firmware
configuration
LED4/SEG4 display segment that drives an external LED or LCD depending on the firmware
configuration
LED5/SEG5 display segment that drives an external LED or LCD depending on the firmware
configuration
Coulomb counter differential input. Connect to one side of the sense resistor.
Coulomb counter differential input. Connect to one side of the sense resistor.
Master reset input that forces the device into reset when held low. Must be held high for normal
operation. Connect to RESET for correct operation of device.
Negative supply voltage input. Connect all VSS pins together for operation of device.
2.5-V regulator output. Connect at least a 1-mF capacitor to REG25 and VSS.
RAM/Register backup input. Connect a capacitor to this pin and VSS to protect loss of RAM/Register data
in case of short circuit condition.
Negative supply voltage input. Connect all VSS pins together for operation of device.
Reset output. Connect to MSRT.
Short circuit and overload detection differential input. Connect to sense resistor.
Short circuit and overload detection differential input. Connect to sense resistor.
Cell voltage sense input and cell balancing input for the negative voltage of the bottom cell in cell stack.
Cell voltage sense input and cell balancing input for the positive voltage of the bottom cell and the
negative voltage of the second lowest cell in cell stack.
Cell voltage sense input and cell balancing input for the positive voltage of the second lowest cell in cell
stack and the negative voltage of the second highest cell in 4-series cell applications.
Cell voltage sense input and cell balancing input for the positive voltage of the second highest cell and
the negative voltage of the highest cell in 4-series cell applications. Connect to VC3 in 2-series cell stack
applications.
Cell voltage sense input and cell balancing input for the positive voltage of the highest cell in cell stack in
4-series cell applications. Connect to VC2 in 3-series or 2-series cell stack applications.
Battery stack voltage sense input
High-side N-channel charge FET gate drive
6
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