THS7319 Datasheet, PDF (5/34 Pages) Texas Instruments – 3-Channel, Very Low Power Video Amplifiers with EDTV Filters and 6-dB Gain

THS7319
www.ti.com.............................................................................................................................................................. SBOS468A – JUNE 2009 – REVISED JULY 2009
PIN CONFIGURATION
ZSV PACKAGE
MicrostarCSP 9-BALL
(TOP VIEW)
1
2
3
Ch 1 IN GND Ch 1 OUT
A
Ch 2 IN
EN Ch 2 OUT
B
Ch 3 IN
V_{S+ Ch 3 OUT}
C
ZSV PACKAGE
MicrostarCSP 9-BALL
(TOP VIEW)
Device Code
NXN
YM
Year and Month
of Assembly
Pin A1 Index
TERMINAL
NAME
Channel 1 Input
GND
Channel 1 Output
Channel 2 Input
Enable
Channel 2 Output
Channel 3 Input
V_S+
Channel 3 Output
Table 1. TERMINAL FUNCTIONS
NO.
I/O
DESCRIPTION
A1
I Video input, channel 1
A2
I Ground pin for all internal circuitry
A3
O Video output, channel 1
B1
I Video input, channel 2
B2
I
Enable pin. Logic high enables the THS7319; logic low disables the THS7319.
This pin must not be left floating.
B3
O Video output, channel 2
C1
I Video Input, channel 3
C2
I Positive power-supply pin; connect to +2.6 V or +5 V.
C3
O Video output, channel 3
FUNCTIONAL BLOCK DIAGRAM
Channel 1 Input
x1
Level
Shift
3-Pole
20-MHz
LPF
6 dB
Channel 1 Output
Channel 2 Input
x1
Level
Shift
3-Pole
20-MHz
LPF
6 dB
Channel 2 Output
Channel 3 Input
x1
Level
Shift
3-Pole
20-MHz
LPF
6 dB
Channel 3 Output
V_S+
Enable
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