THS7319 Datasheet, PDF (24/34 Pages) Texas Instruments – 3-Channel, Very Low Power Video Amplifiers with EDTV Filters and 6-dB Gain

THS7319
SBOS468A – JUNE 2009 – REVISED JULY 2009.............................................................................................................................................................. www.ti.com
X Pitch
Metal Diameter
See Dimension
A or C
Y Pitch
T Trace Width
Min Space S
(1) Circuit traces from the NSMD-defined PWB lands should be 75-µm to 100-µm wide in the exposed area inside the solder mask opening.
Wider trace widths reduce device stand-off and impact reliability.
(2) Best reliability results are achieved when the PWB laminate glass transition temperature is greater than the operating temperature range
of the intended application.
(3) For a PWB using a Ni/Au surface-finish, the Au thickness should be less than 0.5 µm to avoid a reduction in thermal fatigue performance.
(4) Solder mask thickness should be less than 20 µm above the copper circuit pattern.
(5) Best solder stencil performance is achieved using laser-cut stencils with electro-polishing. Use of chemically-etched stencils results in
inferior solder-paste volume control.
(6) Trace routing away from the MicrostarCSP device should be balanced in X and Y directions to avoid unintentional component movement
because of solder wetting forces.
Figure 54. Trace Width/Spacing Example
PAD
NSMD
Table 3. Definitions for Figure 54
PACKAGE PITCH
0.50 mm
(A or C) METAL DIAMETER
0.25 mm
(S or T) TRACE
WIDTH/SPACING
0.08 mm
24
Submit Documentation Feedback
Product Folder Link(s): THS7319
Copyright © 2009, Texas Instruments Incorporated