THS1040 Datasheet, PDF (5/32 Pages) Texas Instruments – 3-V, 10-BIT , 40-MSPS CMOS ANALOG TO DIGITAL CONVERTER

THS1040
SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004
electrical characteristics
over recommended operating conditions, AVDD = 3 V, DVDD = 3 V, fs = 40 MSPS/50% duty cycle, MODE = AVDD (internal reference),
differential input range = 1 VPP and 2 VPP, TA = Tmin to Tmax (unless otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
AVDD
DVDD
ICC
PD
PD(STBY)
Supply voltage
Operating supply current
Power dissipation
Standby power
See Note 4
See Note 4
3
3.6
V
3
3.6
33
40 mA
100 120 mW
75
µW
t(WU)
Power up time for all references from standby, t(PU)
Wake-up time
10 µF bypass
See Note 5
770
µs
45
µs
REFT, REFB internal ADC reference voltages outputs (MODE = AV_DD or AV_DD/2) (See Note 6)
PARAMETER
TEST CONDITIONS
MIN TYP MAX
Reference voltage top, REFT
VREF = 0.5 V
1.75
VREF = 1 V
AVDD = 3 V
2
VREF = 0.5 V
1.25
Reference voltage bottom, REFB
VREF = 1 V
AVDD = 3 V
1
Input resistance between REFT and REFB
1.4 1.9 2.5
UNIT
V
V
kΩ
VREF (on-chip voltage reference generator)
PARAMETER
Internal 0.5-V reference voltage (REFSENSE = VREF)
Internal 1-V reference voltage (REFSENSE = AGND)
Reference input resistance (REFSENSE = AVDD, MODE = AVDD/2 or AVDD)
MIN TYP MAX UNIT
0.45 0.5 0.55 V
0.95
1 1.05 V
7
14
21 kΩ
dc accuracy
PARAMETER
MIN TYP MAX UNIT
Resolution
10
Bits
INL
Integral nonlinearity (see definitions)
−1.5 ± 0.75 1.5 LSB
DNL Differential nonlinearity (see definitions)
−0.9 ± 0.45 0.9 LSB
Zero error (see definitions)
−1.5 0.7 1.5 %FSR
Full-scale error (see definitions)
−3 2.2
3 %FSR
Missing code
No missing code assured
NOTE 4: Apply a −1 dBFS 10-KHz triangle wave at AIN+ and AIN− with an internal bandgap reference and ADC reference enabled, and BIASREF
enabled at AVDD/2. Any additional load at BIASREF or VREF may require additional current.
NOTE 5: Wake-up time is from the power-down state to accurate ADC samples being taken and is specified for MODE = AGND with external
reference sources applied to the device at the time of release of power-down, and an applied 40-MHz clock. Circuits that need to power
up are the bandgap, bias generator, ADC, and SHA.
NOTE 6: External reference values are listed in the Recommended Operating Conditions Table.
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