THS1040 Datasheet, PDF (3/32 Pages) Texas Instruments – 3-V, 10-BIT , 40-MSPS CMOS ANALOG TO DIGITAL CONVERTER

THS1040
SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004
Terminal Functions
TERMINAL
NAME
NO.
AGND
1, 19
AIN+
27
AIN−
25
AVDD
28
BIASREF
21
CLK
15
DGND
14
DVDD
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
D8
11
D9
12
MODE
23
OE
16
OVR
13
REFB
24
REFSENSE
18
REFT
22
STBY
17
TEST
20
VREF
26
I/O
DESCRIPTION
I Analog ground
I Positive analog input
I Negative analog input
I Analog supply
O
When the MODE pin is at AVDD, a buffered AVDD/2 is present at this pin that can be used by external input
biasing circuits. The output is high impedance when MODE is AGND or AVDD/2.
I Clock input
I Digital ground
I Digital supply
Digital data bit 0 (LSB)
Digital data bit 1
Digital data bit 2
Digital data bit 3
O
Digital data bit 4
Digital data bit 5
Digital data bit 6
Digital data bit 7
Digital data bit 8
Digital data bit 9 (MSB)
I Operating mode select (AGND, AVDD/2, or AVDD)
I High to 3-state the data bus, low to enable the data bus
O Out-of-range indicator
I/O Bottom ADC reference voltage
I VREF mode control
I/O Top ADC reference voltage
I Drive high to power-down the THS1040
I Production test pin. Tie to DVDD or DGND
I/O Internal or external reference
www.ti.com
3