THS1040 Datasheet, PDF (15/32 Pages) Texas Instruments – 3-V, 10-BIT , 40-MSPS CMOS ANALOG TO DIGITAL CONVERTER

THS1040
SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004
PRINCIPLES OF OPERATION
sample-and-hold
Differential input signal sources can be connected directly to the AIN+ and AIN− pins using either dc- or
ac-coupling.
For single-ended sources, the signal can be dc- or ac-coupled to one of AIN+ or AIN−, and a suitable reference
voltage (usually the midscale voltage, see operating configuration examples) must be applied to the other pin.
Note that connecting the signal to AIN− results in it being inverted during sampling.
The sample and hold differential output voltage VQ = (VQ+) − (VQ−) is given by:
VQ = (AIN+) − (AIN−)
(1)
analog-to-digital converter
VQ is digitized by the ADC, using the voltages at pins REFT and REFB to set the ADC zero-scale (code 0) and
full-scale (code 1023) input voltages.
VQ(ZS) + * (REFT * REFB)
(2)
VQ(FS) + (REFT * REFB)
(3)
Any inputs at AIN+ and AIN− that give VQ voltages less than VQ(ZS) or greater than VQ(FS) lie outside the
ADC’s conversion range and attempts to convert such voltages are signalled by driving pin OVR high when the
conversion result is output. VQ voltages less than VQ(ZS) digitize to give ADC output code 0 and VQ voltages
greater than VQ(FS) give ADC output code 1023.
complete system and system input range
Combining the above equations to find the input voltages [(AIN+) − (AIN−)] that correspond to the limits of the
ADC’s valid input range gives:
(REFB * REFT) v [(AIN)) * (AIN*)] v (REFT * REFB)
(4)
For both single-ended and differential inputs, the ADC can thus handle signals with a peak-to-peak input range
[(AIN+) − (AIN−)] of:
[(AIN+) − (AIN−)] pk-pk input range = 2 x (REFT − REFB)
(5)
The REFT and REFB voltage difference and the gain sets the device input range. The next sections describe
in detail the various methods available for setting voltages REFT and REFB to obtain the desired input span
and device performance.
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