ADS5527_07 Datasheet, PDF (48/57 Pages) Texas Instruments – 12-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

ADS5527
SLWS196A – DECEMBER 2006 – REVISED MAY 2007
www.ti.com
DEFINITION OF SPECIFICATIONS (continued)
AC Power Supply Rejection Ratio (AC PSRR)
AC PSRR is the measure of rejection of variations in the supply voltage of the ADC. If ∆V_SUP is the change in
the supply voltage and ∆V_OUT is the resultant change in the ADC output code (referred to the input), then
PSRR = 20Log¹⁰
DV_OUT
DV_SUP
(Expressed in dBc)
(8)
Common Mode Rejection Ratio (CMRR)
CMRR is the measure of rejection of variations in the input common-mode voltage of the ADC. If ∆Vcm is the
change in the input common-mode voltage and ∆V_OUT is the resultant change in the ADC output code (referred
to the input), then
CMRR = 20Log¹⁰
DV_OUT
DV_CM
(Expressed in dBc)
(9)
Voltage Overload Recovery
The number of clock cycles taken to recover to less than 1% error for a 6-dB overload on the analog inputs. A
6-dBFS sine wave at Nyquist frequency is used as the test stimulus.
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