MSP430X15X Datasheet, PDF (46/73 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x15x, MSP430x16x, MSP430x161x
MIXED SIGNAL MICROCONTROLLER
SLAS368E − OCTOBER 2002 − REVISED AUGUST 2006
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
12-bit DAC, reference input specifications
Ve_REF+
PARAMETER
Reference input
voltage range
TEST CONDITIONS
DAC12IR=0, (see Notes 1 and 2)
DAC12IR=1, (see Notes 3 and 4)
V_CC
2.2V/3V
2.2V/3V
MIN
TYP
MAX UNIT
AV_CC/3 AV_CC+0.2
V
AVcc AVcc+0.2
DAC12_0 IR=DAC12_1 IR =0
2.2V/3V
20
MΩ
Ri_(VREF+),
Ri_(VeREF+)
Reference input
resistance
DAC12_0 IR=1, DAC12_1 IR = 0
DAC12_0 IR=0, DAC12_1 IR = 1
DAC12_0 IR=DAC12_1 IR =1
DAC12_0 SREFx = DAC12_1 SREFx
2.2V/3V
2.2V/3V
2.2V/3V
40
48
20
24
56 kΩ
28 kΩ
(see Note 5)
NOTES:
1. For a full-scale output, the reference input voltage can be as high as 1/3 of the maximum output voltage swing (AV_CC).
2. The maximum voltage applied at reference input voltage terminal Ve_REF+ = [AV_CC − V_E(O)] / [3*(1 + E_G)].
3. For a full-scale output, the reference input voltage can be as high as the maximum output voltage swing (AV_CC).
4. The maximum voltage applied at reference input voltage terminal Ve_REF+ = [AV_CC − V_E(O)] / (1 + E_G).
5. When DAC12IR = 1 and DAC12SREFx = 0 or 1 for both channels, the reference input resistive dividers for each DAC are in parallel
reducing the reference input resistance.
12-bit DAC, dynamic specifications; V_ref = V_CC, DAC12IR = 1 (see Figure 23 and Figure 24)
PARAMETER
DAC12 on-
t_ON
time
TEST CONDITIONS
DAC12_xDAT = 800h,
Error_V(O) < ±0.5 LSB
(see Note 1,Figure 23)
DAC12AMPx=0 → {2, 3, 4}
DAC12AMPx=0 → {5, 6}
DAC12AMPx=0 → 7
V_CC
MIN TYP
2.2V/3V
60
2.2V/3V
15
2.2V/3V
6
t_S(FS)
Settling
DAC12_xDAT =
time,full-scale 80h→ F7Fh→ 80h
DAC12AMPx=2
DAC12AMPx=3,5
DAC12AMPx=4,6,7
2.2V/3V
100
2.2V/3V
40
2.2V/3V
15
t_S(C-C)
Settling time,
code to code
DAC12_xDAT =
3F8h→ 408h→ 3F8h
BF8h→ C08h→ BF8h
DAC12AMPx=2
DAC12AMPx=3,5
DAC12AMPx=4,6,7
2.2V/3V
5
2.2V/3V
2
2.2V/3V
1
DAC12AMPx=2
DAC12_xDAT =
SR
Slew Rate
80h→ F7Fh→ 80h
DAC12AMPx=3,5
DAC12AMPx=4,6,7
2.2V/3V 0.05 0.12
2.2V/3V 0.35
0.7
2.2V/3V 1.5
2.7
DAC12_xDAT =
Glitch energy: full-scale _{80h→ F7Fh→ 80h}
DAC12AMPx=2
DAC12AMPx=3,5
DAC12AMPx=4,6,7
2.2V/3V
10
2.2V/3V
10
2.2V/3V
10
NOTES: 1. R_Load and C_Load connected to AV_SS (not AV_CC/2) in Figure 23.
2. Slew rate applies to output voltage steps >= 200mV.
MAX
120
30
12
200
80
30
UNIT
μs
μs
μs
V/μs
nV-s
DAC Output
ILoad ^{RLoad= 3 kΩ}
AV _CC
2
RO/P(DAC12.x) ^{CLoad = 100pF}
VOUT
Conversion 1
Glitch
Energy
Conversion 2
+/− 1/2 LSB
Conversion 3
+/− 1/2 LSB
tsettleLH
Figure 23. Settling Time and Glitch Energy Testing
tsettleHL
46
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265