MSP430X15X Datasheet, PDF (39/73 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x15x, MSP430x16x, MSP430x161x
MIXED SIGNAL MICROCONTROLLER
SLAS368E − OCTOBER 2002 − REVISED AUGUST 2006
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, built-in reference
V_REF+
AV_CC(min)
I_VREF+
I_L(VREF)+ ^†
PARAMETER
Positive built-in reference
voltage output
AV_CC minimum voltage,
Positive built-in reference
active
Load current out of V_REF+
terminal
Load-current regulation
V_REF+ terminal
TEST CONDITIONS
REF2_5V = 1 for 2.5 V
I_VREF+max ≤ I_VREF+≤ I_VREF+min
3V
REF2_5V = 0 for 1.5 V
I_VREF+max ≤ I_VREF+≤ I_VREF+min
2.2 V/3 V
REF2_5V = 0, I_VREF+max ≤ I_VREF+≤ I_VREF+min
REF2_5V = 1, −0.5mA ≤ I_VREF+≤ I_VREF+min
REF2_5V = 1, −1mA ≤ I_VREF+≤ I_VREF+min
2.2 V
3V
I_VREF+ = 500 μA +/− 100 μA
Analog input voltage ~0.75 V;
REF2_5V = 0
2.2 V
3V
I_VREF+ = 500 μA ± 100 μA
Analog input voltage ~1.25 V;
3V
REF2_5V = 1
MIN NOM
2.4 2.5
1.44 1.5
2.2
2.8
2.9
0.01
0.01
MAX UNIT
2.6
V
1.56
V
−0.5
mA
−1
±2
LSB
±2
±2 LSB
I_{DL(VREF) +‡}
Load current regulation
V_REF+ terminal
I_VREF+ =100 μA → 900 μA,
C_VREF+=5 μF, ax ~0.5 x V_REF+
3V
Error of conversion result ≤ 1 LSB
20 ns
C_VREF+
T_REF+†
Capacitance at pin V_REF+
(see Note 1)
Temperature coefficient of
built-in reference
REFON =1,
0 mA ≤ I_VREF+ ≤ I_VREF+max
I_VREF+ is a constant in the range of
0 mA ≤ I_VREF+ ≤ 1 mA
2.2 V/3 V
2.2 V/3 V
5
10
μF
±100 ppm/°C
t_REFON†
Settle time of internal
reference voltage (see
Figure 16 and Note 2)
I_VREF+ = 0.5 mA, C_VREF+ = 10 μF,
V_REF+ = 1.5 V, V_AVCC = 2.2 V
17 ms
† _{Not production tested, limits characterized}
‡ _{Not production tested, limits verified by design}
NOTES:
1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses
two capacitors between pins V_REF+ and AV_SS and V_REF−/V_eREF− and AV_SS: 10 μF tantalum and 100 nF ceramic.
2. The condition is that the error in a conversion started after t_REFON is less than ±0.5 LSB. The settling time depends on the external
capacitive load.
C_VREF+
100 μF
10 μF
t_REFON ≈ .66 x C_VREF+ [ms] with C_VREF+ in μF
1 μF
0
1 ms
10 ms
100 ms t_REFON
Figure 16. Typical Settling Time of Internal Reference t_REFON vs External Capacitor on V_REF+
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