CC430F613X Datasheet, PDF (46/118 Pages) Texas Instruments – MSP430 SoC with RF Core

CC430F613x
CC430F612x
CC430F513x
ECCN 5E002 TSPA - Technology / Software Publicly Available
SLAS554D – MAY 2009 – REVISED JULY 2010
www.ti.com
Digital Inputs
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
V_IT+
Positive-going input threshold voltage
TEST CONDITIONS
V_CC
1.8 V
3V
MIN TYP
0.80
1.50
V_IT–
Negative-going input threshold voltage
1.8 V
0.45
3V
0.75
V_hys
Input voltage hysteresis (V_IT+ – V_IT–)
1.8 V
0.3
3V
0.4
R_Pull
C_I
I_lkg(Px.x)
t_(int)
Pullup/pulldown resistor
Input capacitance
High-impedance leakage current
External interrupt timing (External trigger pulse
width to set interrupt flag)⁽³⁾
For pullup: V_IN = V_SS
For pulldown: V_IN = V_CC
V_IN = V_SS or V_CC
(1) (2)
Ports with interrupt capability
(see block diagram and
terminal function
descriptions).
1.8 V/3 V
1.8 V/3 V
20
35
5
20
MAX
1.40
2.10
1.00
1.65
0.8
1.0
UNIT
V
V
V
50 kΩ
pF
±50 nA
ns
(1) The leakage current is measured with V_SS or V_CC applied to the corresponding pin(s), unless otherwise noted.
(2) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is
disabled.
(3) An external signal sets the interrupt flag every time the minimum interrupt pulse width t_(int) is met. It may be set by trigger signals shorter
than t_(int).
46
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