CC430F613X Datasheet, PDF (18/118 Pages) Texas Instruments – MSP430 SoC with RF Core

CC430F613x
CC430F612x
CC430F513x
ECCN 5E002 TSPA - Technology / Software Publicly Available
SLAS554D – MAY 2009 – REVISED JULY 2010
Memory Organization
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Table 3. Memory Organization
Main Memory
(flash)
Main: Interrupt
vector
Main: code
memory
RAM
Total
Size
Bank 0
Total
Size
Sect 1
Sect 0
Device
Descriptor
Info A
Information
memory (flash)
Info B
Info C
Info D
BSL 3
Bootstrap loader
(BSL) memory
(flash)
BSL 2
BSL 1
BSL 0
Peripherals
CC430F6137/F6127
CC430F5137 ⁽¹⁾
32kB
00FFFFh–00FF80h
32kB
00FFFFh–008000h
4kB
2kB
002BFFh–002400h
2kB
0023FFh–001C00h
128 B
001AFFh to 001A80h
128 B
001A7Fh to 001A00h
128 B
0019FFh to 001980h
128 B
00197Fh to 001900h
128 B
0018FFh to 001880h
128 B
00187Fh to 001800h
512 B
0017FFh to 001600h
512 B
0015FFh to 001400h
512 B
0013FFh to 001200h
512 B
0011FFh to 001000h
4 KB
000FFFh to 0h
CC430F6126 ⁽¹⁾
32kB
00FFFFh–00FF80h
32kB
00FFFFh–008000h
2kB
not available
2kB
0023FFh–001C00h
128 B
001AFFh to 001A80h
128 B
001A7Fh to 001A00h
128 B
0019FFh to 001980h
128 B
00197Fh to 001900h
128 B
0018FFh to 001880h
128 B
00187Fh to 001800h
512 B
0017FFh to 001600h
512 B
0015FFh to 001400h
512 B
0013FFh to 001200h
512 B
0011FFh to 001000h
4 KB
000FFFh to 0h
CC430F6135/F6125
CC430F5135 ⁽¹⁾
16kB
00FFFFh–00FF80h
16kB
00FFFFh–00C000h
2kB
not available
2kB
0023FFh–001C00h
128 B
001AFFh to 001A80h
128 B
001A7Fh to 001A00h
128 B
0019FFh to 001980h
128 B
00197Fh to 001900h
128 B
0018FFh to 001880h
128 B
00187Fh to 001800h
512 B
0017FFh to 001600h
512 B
0015FFh to 001400h
512 B
0013FFh to 001200h
512 B
0011FFh to 001000h
4 KB
000FFFh to 0h
CC430F5133 ⁽¹⁾
8kB
00FFFFh–00FF80h
8kB
00FFFFh–00E000h
2kB
not available
2kB
0023FFh–001C00h
128 B
001AFFh to 001A80h
128 B
001A7Fh to 001A00h
128 B
0019FFh to 001980h
128 B
00197Fh to 001900h
128 B
0018FFh to 001880h
128 B
00187Fh to 001800h
512 B
0017FFh to 001600h
512 B
0015FFh to 001400h
512 B
0013FFh to 001200h
512 B
0011FFh to 001000h
4 KB
000FFFh to 0h
(1) All not mentioned memory regions are vacant memory and any access to them will cause a Vacant Memory Interrupt.
Bootstrap Loader (BSL)
The BSL enables users to program the flash memory or RAM using various serial interfaces. Access to the
device memory via the BSL is protected by an user-defined password. BSL entry requires a specific entry
sequence on the RST/NMI/SBWTDIO and TEST/SBWTCK pins. For complete description of the features of the
BSL and its implementation, see the MSP430 Memory Programming User's Guide, literature number SLAU265.
Table 4. UART BSL Pin Requirements and Functions
DEVICE SIGNAL
RST/NMI/SBWTDIO
TEST/SBWTCK
P1.6
P1.5
VCC
VSS
BSL FUNCTION
Entry sequence signal
Entry sequence signal
Data transmit
Data receive
Power supply
Ground supply
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