 English |
|
|
|
|
|
|
|
| LPV542 Datasheet, PDF (4/29 Pages) Texas Instruments – LPV542 Dual Nanopower 1.8 V, 490nA, RRIO CMOS Operational Amplifier | |||
| |||
| ◁ |
LPV542
SNOSCX9 â MARCH 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
Supply voltage, V+ to Vâ
Signal input pins
Output short current
Junction temperature
Storage temperature, Tstg
Voltage (2)
Current (2)
MIN
MAX
-0.3
6
(V-) - 0.3
(V+) + 0.3
-10
10
Continuous (4)
-40
150
-65
150
UNIT
V
V
mA
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be
current-limited to 10 mA or less.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) Short-circuit to V-.
6.2 ESD Ratings
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins(2)
VALUE
±2000
±250
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Ratings
Supply Voltage ( V+â Vâ )
Specified Temperature
MIN
NOM
MAX
UNIT
1.6
5.5
V
-40
125
°C
6.4 Thermal Information
THERMAL METRIC(1)
DGK (VSSOP)
8 PINS
DNX (X1SON)
8 PINS
UNIT
RθJA
RθJC(top)
RθJB
ÏJT
ÏJB
RθJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
46.3
33.3
21
°C/W
0.2
21.2
7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Submit Documentation Feedback
Product Folder Links: LPV542
Copyright © 2015, Texas Instruments Incorporated
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese