LPV542 Datasheet, PDF (3/29 Pages) Texas Instruments – LPV542 Dual Nanopower 1.8 V, 490nA, RRIO CMOS Operational Amplifier

www.ti.com
LPV542
SNOSCX9 – MARCH 2015
5 Pin Configuration and Functions
8-Pin VSSOP
DGK Package
Top View
OUT A 1
-IN A 2
+IN A 3
V- 4
A
B
8 V+
7 OUT B
6 -IN B
5 +IN B
8-Pad X1SON
DNX Package
Top View
OUT A 1
-IN A 2
+IN A 3
V- 4
Exposed
Thermal
Die Pad
on
Underside⁽¹⁾
8 V+
7 OUT B
6 -IN B
5 +IN B
(1) Connect thermal die pad to V-.
NAME
OUT A
-IN A
+IN A
V-
+IN B
-IN B
OUT B
V+
Die Pad
PIN
DGK
1
2
3
4
5
6
7
8
--
DNX
1
2
3
4
5
6
7
8
DAP
Pin Functions
I/O
DESCRIPTION
O Channel A Output
I Channel A Inverting Input
I Channel A Non-Inverting Input
P Negative (lowest) power supply
I Channel B Non-Inverting Input
I Channel B Inverting Input
O Channel B Output
P Positive (highest) power supply
P Die Attach Pad. Connect to V- (DNX package only)
Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: LPV542
Submit Documentation Feedback
3