LPV521MGX Datasheet, PDF (4/29 Pages) Texas Instruments – LPV521 Nanopower, 1.8V, RRIO, CMOS Input, Operational Amplifier

LPV521
SNOSB14C – AUGUST 2009 – REVISED FEBRUARY 2013
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1.8V AC Electrical Characteristics⁽¹⁾
Unless otherwise specified, all limits guaranteed for T_A = 25°C, V⁺ = 1.8V, V^− = 0V, V_CM = V_O = V⁺/2, and R_L > 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(2)
(3)
(2)
GBW
Gain-Bandwidth Product
C_L = 20 pF, R_L = 100 kΩ
6.1
SR
Slew Rate
A_V = +1,
Falling Edge
2.9
V_IN = 0V to 1.8V _{Rising Edge}
2.3
θ_m
Phase Margin
C_L = 20 pF, R_L = 100 kΩ
72
G_m
Gain Margin
C_L = 20 pF, R_L = 100 kΩ
19
e_n
Input-Referred Voltage Noise Density f = 100 Hz
265
Input-Referred Voltage Noise
0.1 Hz to 10 Hz
24
i_n
Input-Referred Current Noise
f = 100 Hz
100
kHz
V/ms
deg
dB
nV/√Hz
μV_PP
fA/√Hz
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where T_J > T_A. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
(2) All limits are guaranteed by testing, statistical analysis or design.
(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production
material.
3.3V DC Electrical Characteristics⁽¹⁾
Unless otherwise specified, all limits guaranteed for T_A = 25°C, V⁺ = 3.3V, V^− = 0V, V_CM = V_O = V⁺/2, and R_L > 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
(2)
Typ
(3)
Max
(2)
Units
V_OS
Input Offset Voltage
TCV_OS
I_BIAS
I_OS
CMRR
Input Offset Voltage Drift⁽⁴⁾
Input Bias Current
Input Offset Current
Common Mode Rejection Ratio
PSRR
Power Supply Rejection Ratio
CMVR
A_VOL
Common Mode Voltage Range
Large Signal Voltage Gain
V_CM = 0.3V
V_CM = 3V
0V ≤ V_CM ≤ 3.3V
0V ≤ V_CM ≤ 2.2V
2.7V ≤ V_CM ≤ 3.3V
1.6V ≤ V⁺ ≤ 5.5V
V_CM = 0.3V
CMRR ≥ 72 dB
CMRR ≥ 70 dB
V_O = 0.5V to 2.8V
R_L = 100 kΩ to V⁺/2
0.1
±1.0
±1.23
mV
0.1
±1.0
±1.23
±0.4
±3
μV/°C
0.01
±1
±50
pA
20
fA
72
97
70
78
106
75
dB
77
121
76
85
109
76
dB
−0.1
0
3.4
3.3
V
82
120
76
dB
(1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that T_J = T_A. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where T_J > T_A. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
(2) All limits are guaranteed by testing, statistical analysis or design.
(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production
material.
(4) The offset voltage average drift is determined by dividing the change in V_OS at the temperature extremes by the total temperature
change.
4
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