TMS320C6457 Datasheet, PDF (38/238 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6457
Fixed-Point Digital Signal Processor
SPRS582—March 2009
Table 2-6 Terminal Functions (Part 3 of 23)
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Signal Name
GP15
GP14
GP13
GP12
GP11
GP10
GP09
GP08
GP07
GP06
GP05
GP04
GP03
GP02
GP01
GP00
Ball No. Type IPD/IPU Description
F23
D23
C23
D24
C25
A25
General-purpose input/output (GPIO) pins (I/O/Z). GPIO[15:0] pins are multiplexed at power-on
reset for configuration latching:
C24
• GPIO[0] is mapped to LENDIAN
B25
• GPIO[4:1] are mapped to BOOTMODE[3:0] (see Section 2.5 ‘‘Boot Modes Supported’’ on
I/O/Z IPD
page 24)
F5
• GPIO[8:5] are mapped to DEVNUM[3:0]
C5
• GPIO[13:9] are mapped to CFGGP[4:0]
• GPIO[14] is mapped to HPIWIDTH
F6
• GPIO[15] is mapped to ECLKINSEL
B5
B4
D5
E5
A5
HINT
HCNTL1
HCNTL0
HHWIL
HR/W
HAS
HCS
HDS1
HDS2
HRDY
L4
I/O/Z
M5 I/O/Z
L6
I/O/Z
L3
I/O/Z
K5 I/O/Z
M4 I/O/Z
M3 I/O/Z
L2
I/O/Z
L5
I/O/Z
M6 I/O/Z
HOST PORT INTERFACE (HPI)
Host interrupt from DSP to host (O/Z)
Host control -selects between control, address, or data registers (I) [default]
Host control -selects between control, address, or data registers (I) [default]
Host half-word select — first or second half-word (not necessarily high or low order).
For HPI16 bus width selection only] (I) [default]
Host read or write select (I) [default]
Host address strobe (I) [default]
Host chip select (I) [default]
Host data strobe 1 (I) [default]
Host data strobe 2 (I) [default]
Host ready from DSP to host (O/Z) [default]
38 Device Overview
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