TMS320VC5504 Datasheet, PDF (36/128 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320VC5504
Fixed-Point Digital Signal Processor
SPRS609A – JUNE 2009 – REVISED JULY 2009
www.ti.com
Table 3-17. Regulators and Power Management Terminal Functions
SIGNAL
NAME
TYPE⁽¹⁾ OTHER^{(2) (3)}
NO.
DESCRIPTION
Regulators
DSP_LDOO
E10
S
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be connected to an ~ 1.0 µF decoupling
capacitor to V_SS. For more detailed information, see Section 6.3.3, Power-Supply
Decoupling.
DSP_LDOI
F14
S
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be connected to the same supply as the
ANA_LDOI pin (B12).
DSP_LDO_EN D12
I
–
ANA_LDOI
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be tied to ground (V_SS). For future device
family pin compatibility, board designs should have this pin layout with a zero-Ω
resistor to ANA_LDOI and a zero-Ω resistor to ground. For VC5504, only the zero-Ω
resistor to ground should be populated.
DSP_LDO_V D13
I
–
ANA_LDOI
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be connected to the same supply as the
ANA_LDOI pin (B12). For future device family pin compatibility, board designs
should have this pin layout with a zero-Ω resistor to ANA_LDOI and a zero-Ω
resistor to ground. For VC5504, only the zero-Ω resistor to ANA_LDOI should be
populated.
USB_LDOO
F12
S
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be left unconnected.
USB_LDOI
F13
S
[Not supported on this device. Reserved for compatibility with future devices].
For proper device operation, this pin must be connected to the same supply as the
ANA_LDOI pin (B12).
ANA_LDOO
A12
S
Analog LDO output. This output provides up to 3 mA of current regulated to 1.3 V
(see the I_SD parameter in Section 5.3, Electrical Characteristics Over Recommended
Ranges of Supply Voltage and Operating Temperature).
For proper device operation, this pin must be connected to an ~ 1.0 µF decoupling
capacitor to V_SS. For more detailed information, see Section 6.3.3, Power-Supply
Decoupling.
ANA_LDOI
B12
S
Analog LDO input. This input pin must be connected to a power supply with a
voltage range of 1.8 V to 3.6 V. It supplies power for the ANA_LDO, the bandgap
reference generator circuits, and is the I/O supply for some input pins.
BG_CAP
B13
O
Bandgap reference filter signal. For proper device operation, this pin needs to be
bypassed with a 0.1 µF capacitor to analog ground (V_{SSA_ANA}).
This external capacitor provides filtering for stable reference voltages & currents
generated by the bandgap circuit. The bandgap produces the references for use by
the System PLL and POR circuits.
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 4.8.1, Pullup/Pulldown Resistors.
(3) Specifies the operating I/O supply voltage for each signal
36
Device Overview
Submit Documentation Feedback