AM1802_15 Datasheet, PDF (35/182 Pages) Texas Instruments – AM1802 ARM® Microprocessor

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AM1802
SPRS710E – NOVEMBER 2010 – REVISED MARCH 2014
Table 3-18. General Purpose Input Output Terminal Functions (continued)
SIGNAL
NAME
GP7[15]
GP7[14]
GP7[13]
GP7[12]
GP7[11]
GP7[10]
GP7[9]
GP7[8]
GP7[7] / BOOT[7]
GP7[6] / BOOT[6]
GP7[5] / BOOT[5]
GP7[4] / BOOT[4]
GP7[3] / BOOT[3]
GP7[2] / BOOT[2]
GP7[1] / BOOT[1]
GP7[0] / BOOT[0]
GP8[15]
GP8[14]
GP8[13]
GP8[12]
GP8[11]
GP8[10]
GP8[9]
GP8[8]
AXR0 / GP8[7] / MII_TXD[0]
SPI0_SOMI / GP8[6] / MII_RXER
SPI0_SIMO / GP8[5] / MII_CR
SPI0_SCS[5] / UART0_RXD / GP8[4] / MII_RXD[3]
SPI0_SCS[4] / UART0_TXD / GP8[3] / MII_RXD[2]
SPI0_SCS[3] / UART0_CTS / GP8[2] / MII_RXD[1]
SPI0_SCS[2] / UART0_RTS / GP8[1] / MII_RXD[0]
RTCK / GP8[0] ⁽¹⁾
NO.
GP7
U2
U1
V3
V2
V1
W3
W2
W1
P4
R3
R2
R1
T3
T2
T1
U3
GP8
G1
G2
J4
G3
F1
F2
H4
G4
F3
C16
C18
C19
D18
E17
D16
K17
TYPE ⁽¹⁾
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PULL ⁽²⁾
CP[28]
CP[28]
CP[28]
CP[28]
CP[28]
CP[28]
CP[28]
CP[28]
CP[29]
CP[29]
CP[29]
CP[29]
CP[29]
CP[29]
CP[29]
CP[29]
CP30]
CP[30]
CP[30]
CP[30]
CP[31]
CP[31]
CP[31]
CP[31]
CP[6]
CP[7]
CP[7]
CP[8]
CP[8]
CP[9]
CP[9]
IPD
POWER
GROUP ⁽³⁾
DESCRIPTION
C
C
C
C
C
C
C
C
GPIO Bank 7
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
GPIO Bank 8
A
A
A
A
A
A
A
B
(1) GP8[0] is initially configured as a reserved function after reset and will not be in a predictable state. This signal will only be stable after
the GPIO configuration for this pin has been completed. Users should carefully consider the system implications of this pin being in an
unknown state after reset.
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