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AM1802_15 Datasheet, PDF (1/182 Pages) Texas Instruments – AM1802 ARM® Microprocessor | |||
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AM1802
SPRS710E â NOVEMBER 2010 â REVISED MARCH 2014
AM1802 ARM® Microprocessor
1 AM1802 ARM Microprocessor
1.1 Features
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⢠300-MHz ARM926EJ-S⢠RISC MPU
⢠ARM926EJ-S Core
â 32-Bit and 16-Bit ( Thumb®) Instructions
â Single-Cycle MAC
â ARM Jazelle® Technology
â Embedded ICE-RT⢠for Real-Time Debug
⢠ARM9⢠Memory Architecture
â 16KB of Instruction Cache
â 16KB of Data Cache
â 8KB of RAM (Vector Table)
â 64KB of ROM
⢠Enhanced Direct Memory Access Controller 3
(EDMA3):
â 2 Channel Controllers
â 3 Transfer Controllers
â 64 Independent DMA Channels
â 16 Quick DMA Channels
â Programmable Transfer Burst Size
⢠128KB of On-Chip Memory
⢠1.8-V or 3.3-V LVCMOS I/Os (Except for USB and
DDR2 Interfaces)
⢠Two External Memory Interfaces:
â EMIFA
⢠NOR (8- or 16-Bit-Wide Data)
⢠NAND (8- or 16-Bit-Wide Data)
⢠16-Bit SDRAM with 128-MB Address Space
â DDR2/Mobile DDR Memory Controller with one
of the following:
⢠16-Bit DDR2 SDRAM with 256-MB Address
Space
⢠16-Bit mDDR SDRAM with 256-MB Address
Space
⢠Three Configurable 16550-Type UART Modules:
â With Modem Control Signals
â 16-Byte FIFO
â 16x or 13x Oversampling Option
1.2 Applications
⢠Medical, Healthcare, and Fitness
⢠Building Automation
⢠Two Serial Peripheral Interfaces (SPIs) Each with
Multiple Chip Selects
⢠One Multimedia Card (MMC)/Secure Digital (SD)
Card Interfaces with Secure Data I/O (SDIO)
Interfaces
⢠One Master and Slave Inter-Integrated Circuit ( I2C
Busâ¢)
⢠USB 2.0 OTG Port with Integrated PHY (USB0)
â USB 2.0 High- and Full-Speed Client
â USB 2.0 High-, Full-, and Low-Speed Host
â End Point 0 (Control)
â End Points 1, 2, 3, 4 (Control, Bulk, Interrupt or
ISOC) RX and TX
⢠One Multichannel Audio Serial Port (McASP):
â Transmit and Receive Clocks
â Two Clock Zones and 16 Serial Data Pins
â Supports TDM, I2S, and Similar Formats
â DIT-Capable
â FIFO Buffers for Transmit and Receive
⢠10/100 Mbps Ethernet MAC (EMAC):
â IEEE 802.3 Compliant
â MII Media-Independent Interface
â RMII Reduced Media-Independent Interface
â Management Data I/O (MDIO) Module
⢠Real-Time Clock (RTC) with 32-kHz Oscillator and
Separate Power Rail
⢠Three 64-Bit General-Purpose Timers (Each
Configurable as Two 32-Bit Timers)
⢠One 64-Bit General-Purpose or Watchdog Timer
(Configurable as Two 32-Bit General-Purpose
Timers)
⢠Packages:
â 361-Ball Pb-Free Plastic Ball Grid Array (PBGA)
[ZCE Suffix], 0.65-mm Ball Pitch
â 361-Ball PBGA [ZWT Suffix], 0.80-mm Ball Pitch
⢠Industrial Temperature
⢠ePOS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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