THS1041 Datasheet, PDF (3/37 Pages) Texas Instruments – 10-Bit, 40-MSPS ANALOG-TO-DIGITAL CONVERTER WITH PGA AND CLAMP

THS1041
SLAS289B – OCTOBER 2001 – REVISED FEBRUARY 2002
Terminal Functions
TERMINAL
NAME
NO.
AGND
1
AIN+
27
AIN–
25
AVDD
28
CLAMP
19
CLAMPIN
20
CLAMPOUT
21
CLK
15
DGND
14
DVDD
2
I/O0
3
I/O1
4
I/O2
5
I/O3
6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
I/O8
11
I/O9
12
MODE
23
OE
16
OVR
13
REFB
24
REFSENSE
18
REFT
22
VREF
26
WR
17
I/O
DESCRIPTION
I Analog ground
I Positive analog input
I Negative analog input
I Analog supply
I High to enable clamp mode, low to disable clamp mode
I Connect to an external analog clamp reference input.
The CLAMPOUT pin can provide a dc restoration or a bias source function (see AC reference generation
O section). If neither function is required then the clamp can be disabled to save power (see power management
section).
I Clock input
I Digital ground
I Digital supply
Digital I/O bit 0 (LSB)
Digital I/O bit 1
Digital I/O bit 2
Digital I/O bit 3
I/O
Digital I/O bit 4
Digital I/O bit 5
Digital I/O bit 6
Digital I/O bit 7
Digital I/O bit 8
Digital I/O bit 9 (MSB)
I Operating mode select (AGND, AVDD/2, AVDD)
I High to high-impedance state the data bus, low to enable the data bus
O Out-of-range indicator
I/O Bottom ADC reference voltage
I VREF mode control
I/O Top ADC reference voltage
I/O Internal or external reference
I Write strobe
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