GC1012B_07 Datasheet, PDF (26/30 Pages) Texas Instruments – 3.3V DIGITAL TUNER CHIP

GC1012B 3.3V DIGITAL TUNER
SLWS138B
5.5 SYNCHRONIZING MULTIPLE GC1012B CHIPS
A system containing a bank of GC1012B chips will need to be synchronized so that the output
frames from each chip are aligned, and, if desired, so that their frequency accumulators are running
synchronously. The GC1000 Input Switch chip has built in sync counters which are designed specifically for
this purpose. If the GC1000 chip is not used, then the one-shot strobe (see Section 3.7) can be used. The
bank of chips should be interconnected so that the OS pin of one GC1012B chip is tied to the SS input of
all of the chips. The one-shot strobe mode can then be used to simultaneously synchronize all of the chips.
The OS pin of a second GC1012B chip should be tied to the AS input of all of the chips. The one-shot mode
of the second chip can be used to synchronize the frequency accumulators whenever the tuning frequency
has been changed.
5.6 PROCESSING COMPLEX DATA
Two GC1012B chips can be used to process complex input data by using one chip to process the
I-input data and the other to process the Q-input data. If the two chips are synchronized as discussed above,
then the complex output stream can be reconstructed by adding and subtracting the I and Q outputs of the
two chips. A programmable gate array chip such as from XILINX would be ideal for this post-processing.
The configuration for processing complex data is illustrated in Figure 6.
I_IN
X
I
GC1012B ^Q
SS
AS
OS
I_OUT
Q_IN
X
I
Q_OUT
GC1012B ^Q
SS
AS
OS
PROGRAMMABLE
GATE
ARRAY
Figure 6. Processing Complex Input Data
Texas Instruments Incorporated
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