TLC5970 Datasheet, PDF (25/48 Pages) Texas Instruments – 3-Channel, 12-Bit, PWM LED Driver with Buck DC/DC Converter and Differential Signal Interface

TLC5970
www.ti.com
SBVS140 – MARCH 2010
DIFFERENTIAL SIGNAL INTERFACE
This device has a differential signal receiver and differential signal driver. These differential components provide
very reliable, high-quality signal integrity over long distances. This integrity allows very large distances between
the display pixels without the need for additional drive circuitry. The drivers are enabled one second after the IC
powers up. A 10-kΩ resistor is internally mounted between SDTA and SDTB/SCKA and SCKB. Table 6 shows a
truth table of the differential signal interface receiver and driver.
Table 6. Differential Signal Interface Truth Table
RECEIVER (SDTA-SDTB, SCKA-SCKB)
DIFFERENTIAL INPUTS
(VID = SDTA/SCKA – SDTB/SCKB)
VID ≥ 0.2 V
–0.2 V < VID < 0.2 V
VID ≤ –0.2 V
Open input
INTERNAL INPUT DATA
High
Undefined
Low
Low
DRIVER (SDTY-SDTZ, SCKY-SCKZ)
DIFFERENTIAL OUTPUTS
DRIVER INPUT SDTY/SCKY
SDTZ/SCKZ
Low
Low
High
High
High
Low
BUCK DC/DC CONVERTER
The buck converter operates with the Pulse Frequency Mode (PFM).The buck converter controls the LED anode
voltage to keep the LED cathode voltage to approximately 1 V for high efficiency and reduces the system
power-supply current. The LED anode voltage is controlled by the buck converter in this manner:
1. After the IC powers on, the LED anode voltage charges up to the FB voltage set by EEPROM with a
soft-start squence. The maximum time of the soft-start sequence is 800 ms.
2. The LED then turns on and comparators check the OUTn voltage when all LED are turned on at the 32nd
GSCLK. If the lowest voltage in OUT0 to OUT2 is below 0.9 V when all OUTn are on at 32nd GSCLK, the
buck converter target voltage is changed by one step to a higher voltage at the rising edge of the 33rd
GSCLK. If the lowest voltage in OUT0 to OUT2 is above 1.1 V, the buck converter target voltage changes by
one step to a lower voltage. If the lowest voltage in OUT0 to OUT2 is between 0.9 V and 1.1 V, then the
buck converter target voltage remains at the previous voltage.
3. If the highest voltage in OUT0 to OUT2 exceeds 4.0 V at the 32nd GSCLK rising edge when all OUTn are
on, then the buck converter target voltage does not change to a higher voltage side.
Parameter Selection for Buck Converter
The following steps select the parameters for the buck converter.
1. PH on-time selection:
VFB Minimum Voltage
Calculated PH On-Duty Ratio1 (%) = _{VCC Maximum Input Voltage} ´ 100
Where:
VFB = the number of LEDs in series × LED minimum forward voltage (V_F) + 1.0 V
(4)
Select the closest and smaller number in Table12, then calculate PH on-duty ratio1 (%).
Example: VCC = 24 V (typical) and 25 V (maximum). LED forward voltage (V_F) = 3.2 V (minimum) and 3.5 V
(typical). Two LEDs are connected in series.
Thus, VFB = 2 × 3.2 + 1 = 7.4 V. The PH on-duty ratio1 (%) = 7.4/25 = 29.6%. Therefore, 29% code ('1h')
should be selected for PH on-duty.
So, the selected PH on-duty in the EEPROM write data latch is 29%.
Copyright © 2010, Texas Instruments Incorporated
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