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THS6204 Datasheet, PDF (25/43 Pages) Texas Instruments – Dual-Port, Differential VDSL2 Line Driver Amplifiers
THS6204
www.ti.com ................................................................................................................................................... SBOS416C – OCTOBER 2007 – REVISED APRIL 2009
DUAL-SUPPLY VDSL DOWNSTREAM
Figure 82 shows an example of a dual-supply VDSL
downstream driver. Both channels of the THS6204
are configured as a differential gain stage to provide
signal drive to the primary winding of the transformer
(here, a step-up transformer with a turns ratio of
1:1.1). The main advantage of this configuration is
the cancellation of all even harmonic distortion
products. Another important advantage for VDSL is
that each amplifier needs only to swing half of the
total output required driving the load.
0.1mF
AFE
2VPP
Max
Assumed
0.1mF
20W
+12V
1/4
THS6204
RF
2kW
IP = 159mA
RS
9.1W
1:1.1
RP
2kW
2.7kW
RG
1.33kW
RP
2.7kW
2kW
RF
RS
2kW
9.1W
ZLINE
RL
100W
20W
1/4
THS6204
IP = 159mA
-12V
Figure 82. Dual-Supply VDSL Downstream Driver
The analog front end (AFE) signal is ac-coupled to
the driver, and the noninverting input of each
amplifier is biased to the mid-supply voltage (ground
in this case). In addition to providing the proper
biasing to the amplifier, this approach also provides a
high-pass filtering with a corner frequency, set here at
5kHz. As the signal bandwidth starts at 26kHz, this
high-pass filter does not generate any problem and
has the advantage of filtering out unwanted lower
frequencies.
The input signal is amplified with a gain set by the
following equation:
GD = 1 +
2 ´ RF
RG
(2)
With RF = 2kΩ and RG = 1.33kΩ, the gain for this
differential amplifier is RP = 2.1kΩ. This gain boosts
the AFE signal, assumed to be a maximum of 2VPP,
to a maximum of 3VPP.
The two back-termination resistors (9.1Ω each)
added at each terminal of the transformer make the
impedance of the modem match the impedance of
the phone line, and also provide a means of detecting
the received signal for the receiver. The value of
these resistors (RM) is a function of the line
impedance and the transformer turns ratio (n), given
by the following equation:
RM =
ZLINE
2n2
(3)
LINE DRIVER HEADROOM MODEL
The first step in a transformer-coupled, twisted-pair
driver design is to compute the peak-to-peak output
voltage from the target specifications. This is done
using the following equations:
V2
PL = 10 ´ log
RMS
(1mW)
´
R
L
(4)
with PL power at the load, VRMS voltage at the load,
and RL load impedance; this gives the following:
VRMS =
(1mW) ´ RL ´ 10
PL
10
(5)
VP = CrestFactor ´ VRMS = CF ´ VRMS
(6)
with VP peak voltage at the load and CF Crest Factor.
VLPP
=
2
´
CF
´
V
RMS
(7)
with VLPP: peak-to-peak voltage at the load.
Consolidating Equation 4 through Equation 7 allows
expressing the required peak-to-peak voltage at the
load as a function of the crest factor, the load
impedance, and the power at the load. Thus,
P
VLPP = 2 ´ CF ´
(1mW) ´ RL ´ 10
L
10
(8)
This VLPP is usually computed for a nominal line
impedance and may be taken as a fixed design
target.
The next step in the design is to compute the
individual amplifier output voltage and currents as a
function of VPP on the line and transformer turns ratio.
As this turns ratio changes, the minimum allowed
supply voltage changes along with it. The peak
current in the amplifier output is given by:
±IP =
1
´
2
2
´
V
LPP
n
´
1
4R
M
(9)
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