TMS320C6678_15 Datasheet, PDF (230/248 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691E—March 2014
7.24.2 Timers Electrical Data/Timing
The tables and figure below describe the timing requirements and switching characteristics of Timer0 through
Timer15 peripherals.
Table 7-83 Timer Input Timing Requirements ⁽¹⁾
(see Figure 7-62)
No.
1
t_w(TINPH)
2
t_w(TINPL)
End of Table 7-83
Pulse duration, high
Pulse duration, low
Min
Max Unit
12C
ns
12C
ns
1 C = 1/SYSCLK1 frequency in ns.
Table 7-84 Timer Output Switching Characteristics ⁽¹⁾
(see Figure 7-62)
No.
3
t_w(TOUTH)
4
t_w(TOUTL)
End of Table 7-84
Pulse duration, high
Pulse duration, low
Parameter
1 C = 1/SYSCLK1 frequency in ns.
Figure 7-62 Timer Timing
1
2
TIMIx
3
TIMOx
Min
12C - 3
12C - 3
Max Unit
ns
ns
4
7.25 Serial RapidIO (SRIO) Port
The SRIO port on the TMS320C6678 device is a high-performance, low pin-count interconnect aimed for
embedded markets. The use of the RapidIO interconnect in a baseband board design can create a homogeneous
interconnect environment, providing even more connectivity and control among the components. RapidIO is based
on the memory and device addressing concepts of processor buses where the transaction processing is managed
completely by hardware. This enables the RapidIO interconnect to lower the system cost by providing lower latency,
reduced overhead of packet data processing, and higher system bandwidth, all of which are key for wireless
interfaces. For more information, see the Serial RapidIO (SRIO) for KeyStone Devices User Guide in ‘‘Related
Documentation from Texas Instruments’’ on page 72.
230 Peripheral Information and Electrical Specifications
Copyright 2014 Texas Instruments Incorporated
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