TMS320C6678_15 Datasheet, PDF (173/248 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6678
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS691E—March 2014
Table 7-38 CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (Sheet 4 of 5)
Input Event# on CIC
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
System Interrupt
INTDST2
INTDST3
INTDST4
INTDST5
INTDST6
INTDST7
INTDST8
INTDST9
INTDST10
INTDST11
INTDST12
INTDST13
INTDST14
INTDST15
EASYNCERR
Description
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
RapidIO interrupt
EMIF16 error interrupt
129
TRACER_CORE_4_INTD
Tracer sliding time window interrupt for individual core
130
TRACER_CORE_5_INTD
Tracer sliding time window interrupt for individual core
131
TRACER_CORE_6_INTD
Tracer sliding time window interrupt for individual core
132
TRACER_CORE_7_INTD
Tracer sliding time window interrupt for individual core
133
QM_INT_PKTDMA_0
Queue manager Interrupt for packet DMA starvation
134
QM_INT_PKTDMA_1
Queue manager Interrupt for packet DMA starvation
135
RapidIO_INT_PKTDMA_0
RapidIO Interrupt for packet DMA starvation
136
PASS_INT_PKTDMA_0
Network coprocessor Interrupt for packet DMA starvation
137
SmartReflex_intrreq0
SmartReflex sensor interrupt
138
SmartReflex_intrreq1
SmartReflex sensor interrupt
139
SmartReflex_intrreq2
SmartReflex sensor interrupt
140
SmartReflex_intrreq3
SmartReflex sensor interrupt
141
VPNoSMPSAck
VPVOLTUPDATE has been asserted but SMPS has not been responded to in a
defined time interval
142
VPEqValue
SRSINTERUPTZ is asserted, but the new voltage is not different from the
current SMPS voltage
143
VPMaxVdd
The new voltage required is equal to or greater than MaxVdd.
144
VPMinVdd
The new voltage required is equal to or less than MinVdd.
145
VPINIDLE
The FSM of Voltage processor is in idle.
146
VPOPPChangeDone
The average frequency error is within the desired limit.
147
Reserved
148
UARTINT
UART interrupt
149
URXEVT
UART receive event
150
UTXEVT
UART transmit event
151
QM_INT_PASS_TXQ_PEND_17
Queue manager pend event
152
QM_INT_PASS_TXQ_PEND_18
Queue manager pend event
153
QM_INT_PASS_TXQ_PEND_19
Queue manager pend event
154
QM_INT_PASS_TXQ_PEND_20
Queue manager pend event
155
QM_INT_PASS_TXQ_PEND_21
Queue manager pend event
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Peripheral Information and Electrical Specifications 173