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TMS320DM643 Datasheet, PDF (21/160 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processo
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2.5.2 Signal Groups Description
TMS320DM643
Video/Imaging Fixed-Point Digital Signal Processor
SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005
CLKIN
CLKOUT4/GP0[1](A)
CLKOUT6/GP0[2](A)
CLKMODE1
CLKMODE0
PLLV
TMS
TDO
TDI
TCK
TRST
EMU0
EMU1
EMU2
EMU3
EMU4
EMU5
EMU6
EMU7
EMU8
EMU9
EMU10
EMU11
Clock/PLL
Reset and
Interrupts
IEEE Standard
1149.1
(JTAG)
Emulation
Reserved
Peripheral
Control/Status
Control/Status
RESET
NMI
GP0[7]/EXT_INT7(B)
GP0[6]/EXT_INT6(B)
GP0[5]/EXT_INT5(B)
GP0[4]/EXT_INT4(B)
RSV23
RSV22
RSV21
RSV02
RSV01
RSV00
TOUT0/MAC_EN
GP0[15]
GP0[14]
GP0[13]
GP0[12]
GP0[11]
GP0[10]
GP0[9]
VDAC/GP0[8]
GP0
GP0[7]/EXT_INT7(B)
GP0[6]/EXT_INT6(B)
GP0[5]/EXT_INT5(B)
GP0[4]/EXT_INT4(B)
GP0[3]
CLKOUT6/GP0[2](A)
CLKOUT4/GP0[1](A)
GP0[0]
General-Purpose Input/Output 0 (GP0) Port
A. These pins are muxed with the GP0 pins and by default these signals function as clocks (CLKOUT4 or CLKOUT6). To use these muxed
pins as GPIO signals, the appropriate GPIO register bits (GPxEN and GPxDIR) must be properly enabled and configured. For more
details, see the Device Configurations section of this data sheet.
B. These pins are GP0 pins that can also function as external interrupt sources (EXT_INT[7:4]). Default after reset is EXT_INTx or GPIO as
input-only.
Figure 2-7. CPU and Peripheral Signals
Device Overview
21