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TCA8418E Datasheet, PDF (21/35 Pages) Texas Instruments – I2C CONTROLLED KEYPAD SCAN IC WITH INTEGRATED ESD PROTECTION
TCA8418E
www.ti.com
SCPS222B – MAY 2010 – REVISED SEPTEMBER 2010
Ghosting
Supports multiple key presses accurately. Applications requiring three-key combinations (such as
<Ctrl><Alt><Del>) must ensure that the three keys are wired in appropriate key positions to avoid ghosting (or
appearing like a 4th key has been pressed)
GPI Events
A column or row configured as GPI can be programmed to be part of the Key Event Table, hence becomes also
capable of generating Key Event Interrupt. A key Event Interrupt caused by a GPI follow the same process flow
as a Key Event Interrupt caused by a Key press.
GPIs configured as part of the Key Event Table allows for single key switches to be monitored as well as other
GPI interrupts. As part of the Event Table, GPIs are represented with decimal value of 97 (0x61 or 1100001) and
run through decimal value of 114 (0x72 or 1110010).
For a GPI that is set as active high, and is enabled in the Key Event Table, the state-machine will add an event
to the event count and event table whenever that GPI goes high. If the GPI is set to active low, a transition from
high to low will be considered a press and will also be added to the event count and event table. Once the
interrupt state has been met, the state machine will internally set an interrupt for the opposite state programmed
in the register to avoid polling for the released state, hence saving current. Once the released state is achieved,
it will add it to the event table. The press and release will still be indicated by bit 7 in the event register.
The GPI Events can also be used as unlocked sequences. When the GPI_EM bit is set, GPI events will not be
tracked when the keypad is locked. GPI_EM bit must be cleared for the GPI events to be tracked in the event
counter and table when the keypad is locked.
Bus Transactions
Data is exchanged between the master and TCA8418E through write and read commands.
Writes
Data is transmitted to the TCA8418E by sending the device address and setting the least significant bit (LSB) to
a logic 0. The command byte is sent after the address and determines which register receives the data that
follows the command byte. There is no limitation on the number of data bytes sent in one write transmission.
SCL
12 3 456 7 8 9
Slave Address
Command Byte
Data to Port
SDA
S
0
1
0
00
0
AD
DR
0
A0
00
0
0
0
10
A
Data 1
Start Condition
Write to Port
R/W Acknowledge
From Slave
Acknowledge
From Slave
0.0 A P
Acknowledge
From Slave
Data Out
from Port
Data Valid
tpv
Figure 9. Write to Output Port Register
SCL
1234 56789
Slave Address
Command Byte
Data to Register
SDA S
0
1
0
0
0
0
AD
DR
0
A
0
0
0
00
0
1
1
A
Data
AP
Start Condition
R/W Acknowledge
From Slave
Acknowledge
From Slave
Acknowledge
From Slave
Figure 10. Write to Configuration or Polarity Inversion Register
Copyright © 2010, Texas Instruments Incorporated
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