DRV8824-Q1_15 Datasheet, PDF (21/30 Pages) Texas Instruments – DRV8824-Q1 Automotive Motor Controller IC

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11 Layout
DRV8824-Q1
SLVSCH0 – APRIL 2014
11.1 Layout Guidelines
The VMA and VMB terminals should be bypassed to GND using low-ESR ceramic bypass capacitors with a
recommended value of 0.01 µF rated for VM. This capacitor should be placed as close to the VMA and VMB pins
as possible with a thick trace or ground plane connection to the device GND pin.
The VMA and VMB pins must be bypassed to ground using a bulk capacitor. This component may be an
electrolytic. If VMA and VMB are connected to the same board net, a single bulk capacitor is sufficient.
A low-ESR ceramic capacitor must be placed in between the CPL and CPH pins. A value of 0.01 µF rated for
VMA and VMB is recommended. Place this component as close to the pins as possible.
A low-ESR ceramic capacitor must be placed in between the VMA and VCP pins. A value of 0.1 µF rated for 16
V is recommended. Place this component as close to the pins as possible. In addition place a 1-MΩ resistor
between VCP and VMA.
Bypass V3P3 to ground with a ceramic capacitor rated 6.3 V. Place this bypassing capacitor as close to the pin
as possible.
11.2 Layout Example
0.01 µF
0.01 µF
1 MΩ
0.1 µF
R_ISENA
R_ISENB
0.01 µF
CP1
CP2
VCP
VMA
AOUT1
ISENA
AOUT2
BOUT2
ISENB
BOUT1
VMB
AVREF
BVREF
GND
GND
nHOME
MODE2
MODE1
MODE0
NC
STEP
nEMBL
DIR
DECAY
nFAULT
nSLEEP
nRESET
V3P3OUT
0.47 µF
Figure 12. DRV8824-Q1 Board Layout
Copyright © 2014, Texas Instruments Incorporated
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