THS1230 Datasheet, PDF (2/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 30 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH POWER DOWN

THS1230
SLAS291B – OCTOBER 2000 – REVISED MARCH 2004
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT
THS1230
THS1230
THS1230
THS1230
THS1230
THS1230
THS1230
THS1230
PACKAGE-
LEAD
TSSOP-28
TSSOP-28
TSSOP-28
TSSOP-28
SOP-28
SOP-28
SOP-28
SOP-28
PACKAGE
DESIGNATOR ⁽¹⁾
SPECIFIED
TEMPERATURE
RANGE
PW
0°C to 70°C
PW
0°C to 70°C
PW
-40°C to 85°C
PW
-40°C to 85°C
DW
0°C to 70°C
DW
0°C to 70°C
DW
-40°C to 85°C
DW
-40°C to 85°C
PACKAGE
MARKING
ORDERING
NUMBER
TH1230
TH1230
TJ1230
TJ1230
TH1230
TH1230
TJ1230
TJ1230
THS1230CPW
THS1230CPWR
THS1230IPW
THS1230IPWR
THS1230CDW
THS1230CDWR
THS1230IDW
THS1230IDWR
(1) For the most current specifictions and package information refer to our Web site at www.ti.com.
FUNCTIONAL BLOCK DIAGRAM
TRANSPORT MEDIA,
QUANTITY
Tube, 50
Tape and reel, 2000
Tube, 50
Tape and reel, 2000
Tube, 20
Tape and reel, 1000
Tube, 20
Tape and reel, 1000
CLK
Timing Circuitry
DV_DD
AIN+
AIN−
CON0
CON1
Sample
and Hold
12-Bit ADC
3-State
Output
Buffers
Configuration
Control
Circuit
Internal
Reference
Circuit
EXTREF REFT REFB AV_DD AGND DGND
OVRNG
D[11:0]
OE
2