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THS1230 Datasheet, PDF (15/22 Pages) Texas Instruments – 3.3-V, 12-BIT, 30 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH POWER DOWN
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VBIAS
VIN+ R1
R2
VIN− R1
R2
VBIAS
THS1230
SLAS291B – OCTOBER 2000 – REVISED MARCH 2004
THS1230
AIN+
R3
AIN−
REFT
REFB
Figure 18. DC-Coupled Differential Input Circuit
A single-ended source may give better overall system performance when it is converted to a differential signal
before driving the THS1230. The configuration in Figure 19 takes a VIN of 1 V and drives the 1:1 transformer
ratio so that value of AIN+ and AIN– converts to fullscale value at the ADC digital output. With VIN at –1 V the
value at AIN+ and AIN– converts to 0 at the ADC digital outputs.
AVDD
2
THS1230
V IN
AIN+
AIN−
REFT
REFB
Figure 19. Transformer Coupled Single-Ended Input
Digital Outputs
The output of THS1230 is in unsigned binary code. The ADC input over-range indicator is output on pin OVRNG.
Capacitive loading on the output should be kept as low as possible (a maximum loading of 10 pF is
recommended) to ensure best performance. Higher output loading causes higher dynamic output currents and
can therefore increase noise coupling into the part's analog front end. To drive higher loads the use of an output
buffer is recommended.
15