SLK2511 Datasheet, PDF (2/21 Pages) Texas Instruments – OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER

SLK2511
OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER
SLLS522A – JUNE 2002 – REVISED OCTOBER 2002
block diagram
PRBSEN
SPILL
PRBS
Generator
4
2:1
MUX
4
4:1
MUX
MUX
TXDATA0..TXDATA3
TXCLKP
TXCLKN
4
4
TXPARP
TXPARN
PAR_VALID
RLOOP
TXCLKSRCP
TXCLKSRCN
REFCLKP
REFCLKN
REFCLKSEL
LCKREFN
LOOPTIME
RSEL(0–1)
RESET
LOL
Parity
Checker
Transmit Clock
Synthesizer
To All The Logic
MUX
Recovered
Clock
Rate
Select
Receive Clock
Recovery
LLOOP
PRBSPASS
RXDAT0..RXDATA3
RXPARP
RXPARN
RXCLKP
RXCLKN
FRAMEN
FSYNCP
FSYNCN
Parity
Generator
PRBS
Verification
4
4
Frame
Sync
4
1:4
MUX
QD
DIV
2:1
MUX
STXDOP
STXDON
SRXDIP
SRXDIN
LOS
SIGDET
2
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265