SLK2511 Datasheet, PDF (18/21 Pages) Texas Instruments – OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER

SLK2511
OC-48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER
SLLS522A – JUNE 2002 – REVISED OCTOBER 2002
APPLICATION INFORMATION
designing with the PowerPad package
The SLK2511 is housed in high-performance, thermally enhanced, 100-pin PZP PowerPAD packages. Use of
a PowerPAD package does not require any special considerations except to note that the PowerPAD, which
is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor. Correct device
operation requires that the PowerPAD be soldered to the thermal land. Do not run any etches or signal vias
under the device, but have only a grounded thermal land, as explained below. Although the actual size of the
exposed die pad may vary, the minimum size required for the keepout area for the 100-pin PZP PowerPAD
package is 12 mm × 12 mm.
A thermal land, which is an area of solder-tinned-copper, is required underneath the PowerPAD package. The
thermal land varies in size depending on the PowerPAD package being used, the PCB construction, and the
amount of heat that needs to be removed. In addition, the thermal land may or may not contain numerous
thermal vias, depending on PCB construction.
Other requirements for thermal lands and thermal vias are detailed in the TI application note PowerPAD
Thermally Enhanced Package Application Report, TI literature number SLMA002, available via the TI Web
pages beginning at URL http://www.ti.com.
Figure 12. Example of a Thermal Land
For the SLK2511, this thermal land should be grounded to the low-impedance ground plane of the device. This
improves not only thermal performance but also the electrical grounding of the device. It is also recommended
that the device ground terminal landing pads be connected directly to the grounded thermal land. The land size
should be as large as possible without shorting device signal terminals. The thermal land may be soldered to
the exposed PowerPAD using standard reflow soldering techniques.
While the thermal land may be electrically floated and configured to remove heat to an external heat sink, it is
recommended that the thermal land be connected to the low-impedance ground plane of the device. More
information may be obtained from the TI application note PHY Layout, TI literature number SLLA020.
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