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BQ2018TS-E1 Datasheet, PDF (2/25 Pages) Texas Instruments – Power Minder IC
bq2018
Pin Descriptions
Functional Description
REG
VCC
VSS
SR1–
SR2
HDQ
RBI
WAKE
Regulator output
REG is the output of the operational trans-
conductance amplifier (OTA) that drives an
external pass n-channel JFET to provide an
optional regulated supply. The supply is
regulated at 3.7V nominal.
Supply voltage input
When regulated by the REG output, VCC is
3.7V ±200mV. When the REG output is not
used, the valid operating range is 2.8V to
5.5V.
Ground
Current sense inputs
The bq2018 interprets charge and discharge
activity by monitoring and integrating the
voltage drop (VSR) across pins SR1 and SR2.
The SR1 input connects to the sense resistor
and the negative terminal of the battery.
The SR2 input connects to the sense resistor
and the negative terminal of the pack. VSR1
< VSR2 indicates discharge, and VSR1 > VSR2
indicates charge. The effective voltage drop,
VSRO, as seen by the bq2018, is VSR + VOS.
Valid input range is ± 200mV.
Data input/output
This bi-directional input/output communi-
cates the register information to the host
system. HDQ is open drain and requires a
pullup/down resistor in the battery pack to
disable/enable sleep mode if the pack is re-
moved from the system.
Register backup input
This input maintains the internal register
states during periods when VCC is below the
minimum operating voltage.
Wake-up output
General Operation
A host can use the bq2018 internal counters and timers
to measure battery state-of-charge, estimate self-
discharge, and calculate the average charge and dis-
charge current into and out of a rechargeable battery.
The bq2018 needs an external host system to perform all
register maintenance. Using information from the
bq2018, the system host can determine the battery
state-of-charge, estimate self-discharge, and calculate
the average charge and discharge currents. During pack
storage periods, the use of an internal temperature sen-
sor doubles the self-discharge count rate every 10° above
25°C.
To reduce cost, power to the bq2018 may be derived using
a low-cost external FET in conjunction with the REG pin.
The bq2018 operating current is less than 80µA. When
the HDQ line remains low for greater than ten seconds
and VSRO (VSR + VOS where VSR is the voltage drop be-
tween SR1 and SR2 and VOS is the offset voltage) is below
the programmed minimal level (WAKE is in High Z), the
bq2018 enters a sleep mode of <10µA where all opera-
tions are suspended. HDQ transitioning high reinitiates
the bq2018.
A register is available to store the calculated offset, allow-
ing current calibration. The offset cancellation register is
written by the bq2018 during pack assembly and is avail-
able to the host system to adjust the current measure-
ments. By adding or subtracting the offset value stored
in the OFR, the true charge and discharge counts can be
calculated to a high degree of certainty.
Figure 1 shows a block diagram of the bq2018, and Table
1 outlines the bq2018 operational states.
REG Output
The bq2018 can operate directly from three or four
nickel-chemistry cells or a single Li-Ion cell as long as
VCC is limited to 2.8 to 5.5V. To facilitate the power sup-
ply requirements of the bq2018, a REG output is present
to regulate an external low-threshold n-JFET. A micro-
power VCC source for the bq2018 can inexpensively be
built using this FET.
When asserted, this output is used to indi-
cate that the charge or discharge activity is
above a programmed minimal level.
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