DRV401_15 Datasheet, PDF (19/36 Pages) Texas Instruments – Sensor Signal Conditioning IC for Closed-Loop Magnetic Current Sensor

DRV401
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DEMAGNETIZATION
Iron cores are not immune to residual (remanence)
magnetism. The residual remanence can produce a signal
offset error, especially after strong current overload, which
goes along with high magnetic field density. Therefore, the
DRV401 includes a signal generator for a demagnetization
cycle. The digital control pin, DEMAG, starts this cycle on
demand after this pin is held high for at least 25.6µs.
Shorter pulses are ignored. The cycle lasts for
approximately 110ms. During this time, the Error flag is
asserted low to indicate that the output is not valid. When
DEMAG is high during power-on, a demagnetization cycle
immediately initiates (12µs) after power-on (V_DD > 4V).
Holding DEMAG low avoids this cycle at power-up (see
the Power-On and Brownout section).
The probe circuit is in normal operation and oscillates
during the demagnetization cycle. The outputs PWM and
PWM are active accordingly.
A demagnetization cycle can be aborted by pulling
DEMAG low, filtered by 25µs to ignore glitches (see
Figure 7). In a typical circuit, the DEMAG pin may be
connected to the positive supply, which enables a degauss
cycle every time the unit is powered on.
The degauss cycle is based on an internal clock and
counter logic. The maximum current is limited by the
resistance of the connected coil in series with the shunt
resistor. The DEMAG logic input requires a +5V
CMOS-compatible signal.
POWER-ON AND BROWNOUT
Power-on is detected with the supply voltage going higher
than 4V at V_DD1. When DEMAG is high, a degauss cycle
is started (see Figure 7a). During this time the ERROR flag
remains low, indicating the not ready condition.
Maintaining DEMAG low prevents this cycle, and the
DRV401 starts operation approximately 32µs after
SBVS070B − JUNE 2006 − REVISED MAY 2009
power-up. If no probe error conditions are detected within
four full cycles (that is, the probe half-periods are shorter
than 32µs and longer than 280ns), the compensation
driver starts and the ERROR pin indicates the ready
condition by going high, typically about 42µs after
power-up.
NOTE: an external pull-up resistor is required to pull the
ERROR pin high.
Both supply pins (V_DD1 and V_DD2) should not differ by more
than 100mV for proper device operation. They are
normally connected together or separately filtered (see
Layout Considerations).
The DRV401 tests for low supply voltage with a brown-out
voltage level of +4V; proper power conditions must be
supplied. Good power-supply and low ESR bypass
capacitors are required to maintain the supply voltage
during the large current pulses that the DRV401 can drive.
A critical voltage level is derived from the proper operation
of the probe driver. The probe interface relies on a peak
current flowing through the probe to trip the comparator.
The probe resistance plus the internal resistance of the
driver (see Electrical Characteristics specification, Probe
Coil Loop, Internal Resistor) sets the lower limit for the
acceptable supply voltage. Voltage drops lasting less than
31µs are ignored. The probe error detection activates the
ERROR pin as soon as proper oscillation fails for more
than 32µs.
A low supply voltage condition, or brown-out, is detected
at +4V. Short and light voltage drops of less than 100µs are
ignored, provided the probe circuit continues to operate. If
the probe no longer operates, the ERROR pin goes active.
Signal overload recovery is only provided if the probe loop
was not discontinued.
A supply drop lasting longer than 100µs generates
power-on reset. A voltage dip down to +1.8V (for V_DD1)
also initiates a power-on reset.
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