DRV401_15 Datasheet, PDF (15/36 Pages) Texas Instruments – Sensor Signal Conditioning IC for Closed-Loop Magnetic Current Sensor

DRV401
www.ti.com
The transition from normal operation to overload happens
relatively slowly, because the inherent sensor transformer
characteristics induce the initial primary current step, as
shown in Figure 3. As the transformer-induced secondary
current starts to decay, the compensation feedback driver
increases its output voltage to maintain the sensor core
flux compensation at zero.
When the system compensation loop reaches its driving
limit, the rising magnetic flux causes one of the probe
PWM half-periods to become shorter. The minimum
half-period of the probe oscillation is limited by the internal
timing to 280ns, based on the properties of the VAC
magnetic sensors. After three consecutive cycles of the
same half-period being shorter than 280ns, the DRV401
goes into overload-latch mode. The device stores the
I_COMP driver output signal polarity and continues producing
the skewed-duty cycle PWM signal. This action prevents
the loss of compensation signal polarity information during
very strong overloads. In this case, both PWM half-periods
are short and approximately equal, because the field
probe stays completely in one of the saturated regions.
The overload-latch condition is removed after the primary
current goes low enough for the I_COMP driver to
compensate, and both half-periods of the probe driver
oscillation become longer than 280ns (the field probe
comes out of the saturated region).
Peak voltages and currents can be generated during
normal operations as well as overload conditions.
Therefore, both probe connection pins are internally
SBVS070B − JUNE 2006 − REVISED MAY 2009
protected against coupled energy from the magnetic core.
Wiring between probe and IC inputs should be short and
guarded against interference; see Layout Considerations.
For reliable operation, error detection circuits monitor the
probe operation:
1. If the probe driver comparator (CMP) output stays low
longer than 32µs, the ERROR flag asserts active, and
the compensation current (I_COMP) is set to zero.
2. If the probe driver period is less than 275ns on three
consecutive pulses, the ERROR flag asserts active.
See the Error Conditions section for more details.
PWM PROCESSING
The outputs PWM and PWM represent the probe output
signal as a differential PWM signal. It can drive external
circuitry or be used for synchronous ripple reduction. The
PWM signal from the probe excitation and sense stage is
internally connected to a high-performance,
switched-capacitor integrator followed by an
integrating-differentiating filter. This filter converts the
PWM signal into a filtered delta signal and prepares it for
driving the analog compensation coil driver. The gain
roll-off frequency of the filter stage is set to provide high dc
gain and loop stability. If additional gain is added from
external circuitry, the internal gain can be reduced by 8dB,
asserting the GAIN pin high (see the External
Compensation Coil Driver section).
1
I_COMP1
3
4
I_COMP2
2
V_OUT
V(1Ω× I_PRIM/10)
Sensor: 4 x 100
R_SH = 10Ω
Step Response
2kHz In
V(Gain) = Low
Channel 1: 2V/div
Channels 2−4: 500mV/div
50µs/div
A current pulse of 0A to 18A (Ch 1) generates the two I_COMP signals (Ch 3 and Ch 4). Ch 2 shows the resulting output signal,
V_OUT. This test uses the M4645-X030 sensor, no bandwidth limitation, but a 20-sample average.
Figure 3. Primary Current Step Response
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