BQ34Z100 Datasheet, PDF (19/50 Pages) Texas Instruments – Wide Range Fuel Gauge with Impedance Track™ Technology

bq34z100
www.ti.com
SLUSAU1 – MAY 2012
This register should only be updated by the bq34z100 during a learning cycle or when IT_ENABLE()
subcommand is received. Refer to the Preparing Optimized Default Flash Constants for Specific Battery Types
Application Report (SLUA334B).
Avg I Last Run
The bq34z100 logs the current averaged from the beginning to the end of each discharge cycle. It stores this
average current from the previous discharge cycle in this register. This register should never need to be
modified. It is only updated by the bq34z100 when required.
Avg P Last Run
The bq34z100 logs the power averaged from the beginning to the end of each discharge cycle. It stores this
average power from the previous discharge cycle in this register. To get a correct average power reading the
bq34z100 continuously multiplies instantaneous current times Voltage() to get power. It then logs this data to
derive the average power. This register should never need to be modified. It is only updated by the bq34z100
when the required.
Delta Voltage
The bq34z100 stores the maximum difference of Voltage() during short load spikes and normal load, so the
Impedance Track algorithm can calculate remaining capacity for pulsed loads. It is not recommended to change
this value.
The Ra Tables
This data is automatically updated during device operation. No user changes should be made except for reading
the values from another pre-learned pack for creating Golden Image Files. Profiles have format Cell0 R_a M,
where M is the number indicating state of charge to which the value corresponds.
PACK CONFIGURATION REGISTER
Some bq34z100 pins are configured via the Pack Configuration data flash register, as indicated in Table 12.
This register is programmed/read via the methods described in ACCESSING DATA FLASH. The register is
located at subclass = 64, offset = 0.
High Byte
Low Byte
Bit 7
RESCAP
X10
Table 12. Pack Configuration Register Bits
Bit 6
CALEN
RESFACTST
EP
Bit 5
RSVD
SLEEP
Bit 4
RSVD
RMFCC
Bit 3
VOLTSEL
RSVD
Bit 2
IWAKE
RSVD
Bit 1
RSNS1
RSVD
Bit 0
RSNS0
TEMPS
RESCAP: No-load rate of compensation is applied to the reserve capacity calculation.
True when set. Default is 0.
CALEN: When enabled, entering calibration mode is permitted. For special use only.
Default = 0.
RSVD: Reserved. Default = 0.
VOLTSEL: This bit selects between use of internal or external battery voltage divider. The
internal divider is for single cell use only. 1 = external. 0 = internal. Default is 0.
IWAKE/RSNS1/RSNS0: These bits configure the current wake function (see Table 16). Default is 0/0/1.
X10: X10 Capacity and/or Current bit. The mA, mAh, and cWh settings and reports
will take on a value of ten times normal. This setting has no actual effect within
the gauge. It is the responsibility of the host to reinterpret the reported values.
X10 current measurement is achieved by calibrating the current measurement
to a value X10 lower than actual.
RESFACTSTEP: Enables Ra step up/down to Max/Min Res Factor before disabling Ra updates.
Default is 1.
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s): bq34z100
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