BC447 Datasheet, PDF (19/36 Pages) ON Semiconductor – High Voltage Transistors

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5 V _+VS
100 pF
0.1 µF
+
6.8 µF
CT
0.1 µF
RT
130 Ω
50 Ω Source
Rg
VI
249 Ω
RM
61.9 Ω
+
THS4271
_
VO
499 Ω
Rf
249 Ω
100 pF
0.1 µF
6.8 µF
+
−5 V ^−VS
Figure 76. Wideband, Inverting Gain
Configuration
In the inverting configuration, some key design
considerations must be noted. One is that the gain resistor
(R_g) becomes part of the signal channel input impedance.
If the input impedance matching is desired (which is
beneficial whenever the signal is coupled through a cable,
twisted pair, long PC board trace, or other transmission
line conductors), R_g may be set equal to the required
termination value and R_f adjusted to give the desired gain.
However, care must be taken when dealing with low
inverting gains, as the resultant feedback resistor value
can present a significant load to the amplifier output. For
an inverting gain of 2, setting R_g to 49.9 Ω for input
matching eliminates the need for R_M but requires a 100-Ω
feedback resistor. This has an advantage of the noise gain
becoming equal to 2 for a 50-Ω source impedance—the
same as the noninverting circuit in Figure 75. However, the
amplifier output now sees the 100-Ω feedback resistor in
parallel with the external load. To eliminate this excessive
loading, it is preferable to increase both R_g and R_f, values,
as shown in Figure 76, and then achieve the input
matching impedance with a third resistor (R_M) to ground.
The total input impedance becomes the parallel
combination of R_g and R_M.
The next major consideration is that the signal source
impedance becomes part of the noise gain equation and
hence influences the bandwidth. For example, the R_M
value combines in parallel with the external 50-Ω source
impedance (at high frequencies), yielding an effective
source impedance of 50 Ω || 61.9 Ω = 27.7 Ω. This
impedance is then added in series with R_g for calculating
the noise gain. The result is 1.9 for Figure 76, as opposed
to the 1.8 if R_M is eliminated. The bandwidth is lower for the
gain of –2 circuit, Figure 76, (NG=+1.9) than for the gain
of +2 circuit in Figure 75.
THS4271
THS4275
SLOS397E − JULY 2002 − REVISED JANUARY 2004
The last major consideration in inverting amplifier design
is setting the bias current cancellation resistor on the
noninverting input. If the resistance is set equal to the total
dc resistance looking out of the inverting terminal, the
output dc error, due to the input bias currents, is reduced
to (input offset current) multiplied by R_f in Figure 76, the dc
source impedance looking out of the inverting terminal is
249 Ω || (249 Ω + 27.7 Ω) = 130 Ω. To reduce the additional
high-frequency noise introduced by the resistor at the
noninverting input, and power-supply feedback, R_T is
bypassed with a capacitor to ground.
SINGLE SUPPLY OPERATION
The THS4271 is designed to operate from a single 5-V to
15-V power supply. When operating from a single power
supply, care must be taken to ensure the input signal and
amplifier are biased appropriately to allow for the
maximum output voltage swing. The circuits shown in
Figure 77 demonstrate methods to configure an amplifier
in a manner conducive for single supply operation.
+VS
50 Ω Source
VI
RT 49.9 Ω
+
THS4271
_
+VS
2
Rf
Rg
249 Ω
249 Ω
VO
499 Ω
+VS
2
50 Ω Source
Rg
VI
249 Ω
61.9 Ω RT
+VS
+VS
2
2
Rf
249 Ω
VS
_
THS4271
+
VO
499 Ω
Figure 77. DC-Coupled Single Supply Operation
Saving Power With Power-Down Functionality
and Setting Threshold Levels With the Reference
Pin
The THS4275 features a power-down pin (PD) which
lowers the quiescent current from 22 mA down to 700 µA,
ideal for reducing system power.
The power-down pin of the amplifiers defaults to the
positive supply voltage in the absence of an applied
voltage, putting the amplifier in the power-on mode of
operation. To turn off the amplifier in an effort to conserve
power, the power-down pin can be driven towards the
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