LP38869_15 Datasheet, PDF (17/23 Pages) Texas Instruments – 1A FlexCap, Low-Dropout Linear Regulator with 0.75% Accuracy

LP38869
www.ti.com
BOARD TYPE
JEDEC 2-Layer
JESD 51-3
JEDEC 4-Layer
JESD 51-7
THERMAL VIAS
None
0
1
2
3
4
6
9
SNVS877B – AUGUST 2012 – REVISED APRIL 2013
θ_JA
141°C/W
131°C/W
78°C/W
65°C/W
59°C/W
56°C/W
53°C/W
50°C/W
Noise, PSRR, and Transient Response
The LP38869 is designed to achieve low dropout voltage and low quiescent current in battery-powered systems
while still maintaining good noise, transient response, and AC rejection (see PSRR vs. Frequency in the Typical
Operating Characteristics). When operating from very noisy sources, supply noise rejection and transient
response can be improved by increasing the input and output capacitor values and employing passive post
filtering. The LP38869 output noise is typically 50 µV_RMS.
Reverse Input-Output Voltage
A reverse voltage condition will exist when the voltage at the output pin is higher than the voltage at the input pin.
Typically this will happen when V_IN is abruptly taken low and C_OUT continues to hold a sufficient charge such that
the input to output voltage becomes reversed. Alternately, this could also happen if a secondary supply is
connected to the LP38869 output.
While V_IN is greater than the UVLO threshold, and the SHDN pin is above the V_SHDN(ON) threshold, the control
loop circuitry will attempt to regulate the output voltage. Since the input voltage is less than the output voltage the
control circuit will drive the gate of the pass element to the full ON condition when the output voltage begins to
fall. In this condition, reverse current will flow from the output pin to the input pin, limited only by the R_DS(ON) of
the pass element and the output to input voltage differential. This will condition will continue until V_IN falls below
the UVLO threshold, or the SHDN pin voltage falls below the V_SHDN(OFF) threshold.
The internal PFET pass element in the LP38869 has an inherent parasitic (body) diode. During normal operation,
the input voltage is higher than the output voltage and the body diode is reverse biased. However, if the output is
turned OFF, either by V_IN < UVLO or V_SHDN < V_SHDN(OFF), and the output voltage is more than 500 mV (typical)
above the input voltage the body diode becomes forward biased and current flows from the output pin to the
input pin through the body diode.
The reverse current in the body diode should be limited to less than 1A continuous and less than 5A peak.
Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: LP38869
Submit Documentation Feedback
17