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DRV595 Datasheet, PDF (17/24 Pages) Texas Instruments – 15V/±3A High-Efficiency PWM Power Driver
DRV595
www.ti.com
SLOS808 – DECEMBER 2012
POWER DISSIPATION AND MAXIMUM AMBIENT TEMPERATURE
Though the DRV595 is much more efficient than traditional linear solutions, the power drop across the on-
resistance of the output transistors does generate some heat in the package, which may be calculated as shown
in Equation 5:
ǒ Ǔ2
PDISS + IOUT
rDS(on), total For example, at the maximum output current of 3 A through a total on-resistance
of 60 mΩ (at TJ = 25°C), the power dissipated in the package is 1.1 W.
(5)
Calculate the maximum ambient temperature using Equation 6:
ǒ Ǔ TA + TJ * θJA PDISS
(6)
PRINTED-CIRCUIT BOARD (PCB LAYOUT)
It is necessary to take care when planning the layout of the printed circuit board. The following suggestions will
help to meet EMC requirements.
• Decoupling capacitors — The high-frequency decoupling capacitors should be placed as close to the PVCC
and AVCC terminals as possible. Large (100 μF or greater) bulk power supply decoupling capacitors should
be placed near the DRV595 on the PVCC supplies. Local, high-frequency bypass capacitors should be
placed as close to the PVCC pins as possible. These caps can be connected to the IC GND pad directly for
an excellent ground connection. Consider adding a small, good quality low ESR ceramic capacitor between
220 pF and 1 nF and a larger mid-frequency cap of value between 100 nF and 1 µF also of good quality to
the PVCC connections at each end of the chip.
• Grounding — The PVCC decoupling capacitors should connect to GND. All ground should be connected at
the IC GND, which should be used as a central ground connection or star ground for the DRV595.
For an example layout, see the DRV595 Evaluation Module (DRV595EVM) User Manual. Both the EVM user's
manual and the thermal pad application report are available on the TI Web site at http://www.ti.com.
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: DRV595
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