DRV595 Datasheet, PDF (15/24 Pages) Texas Instruments – 15V/±3A High-Efficiency PWM Power Driver

DRV595
www.ti.com
SLOS808 – DECEMBER 2012
This is a modulation scheme that allows for smaller ripple current through the TEC load. Each output switches
from 0 volts to the supply voltage. With no input, OUTP and OUTN are in phase with each other so that there is
little or no current in the load. The duty cycle of OUTP is greater than 50% and OUTN is less than 50% for
positive output voltages. The duty cycle of OUTP is less than 50% and OUTN is greater than 50% for negative
output voltages. The voltage across the load sits at 0V throughout most of the switching period, reducing the
switching current, which reduces any I²R losses in the load.
OUTP
OUTP–OUTN
OUTN
0V
Load Current
No Output
OUTP
OUTP–OUTN
OUTN
PVCC
0V
Load Current
0A
Positive Output
OUTP
OUTN
OUTP–OUTN
0V
–PVCC
0A
Load Current
Figure 16. BD Mode Modulation
Negative Output
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